Lines Matching refs:SUB
1085 __ Sub(out, first, second);
1578 __ Sub(out, left_low, right_low);
1580 __ Sub(temp, left_high, right_high);
1584 __ Sub(temp, left_high, HighRegisterFrom(right));
1585 __ Sub(out, left_low, LowRegisterFrom(right));
1752 __ Sub(out, in, operand);
2119 __ Sub(temp, sp, Operand::From(GetStackOverflowReservedBytes(InstructionSet::kArm)));
2146 __ Sub(sp, sp, adjust);
3345 // using SBC and SUB instead.
3350 __ Sub(HighRegisterFrom(out), HighRegisterFrom(out), HighRegisterFrom(in));
3805 void LocationsBuilderARMVIXL::VisitSub(HSub* sub) {
3807 new (GetGraph()->GetAllocator()) LocationSummary(sub, LocationSummary::kNoCall);
3808 switch (sub->GetResultType()) {
3811 locations->SetInAt(1, Location::RegisterOrConstant(sub->InputAt(1)));
3818 locations->SetInAt(1, ArmEncodableConstantOrRegister(sub->InputAt(1), SUB));
3830 LOG(FATAL) << "Unexpected sub type " << sub->GetResultType();
3834 void InstructionCodeGeneratorARMVIXL::VisitSub(HSub* sub) {
3835 LocationSummary* locations = sub->GetLocations();
3839 switch (sub->GetResultType()) {
3841 __ Sub(OutputRegister(sub), InputRegisterAt(sub, 0), InputOperandAt(sub, 1));
3859 __ Vsub(OutputVRegister(sub), InputVRegisterAt(sub, 0), InputVRegisterAt(sub, 1));
3863 LOG(FATAL) << "Unexpected sub type " << sub->GetResultType();
3998 __ Sub(out, out, temp);
4027 __ Sub(temp1, temp1, dividend);
4035 __ Sub(out, temp1, Operand(temp1, vixl32::Shift(ASR), 31));
4037 __ Sub(temp1, temp1, Operand(temp1, vixl32::Shift(ASR), 31));
4679 // rotations as sub-word sized rotations in the other direction) as appropriate.
5540 case ADD: neg_opcode = SUB; neg_value = -value; break;
5542 case SUB: neg_opcode = ADD; neg_value = -value; break;
5562 case SUB:
7147 __ Sub(temp, temp, path_to_root);
7152 if (GetAssembler()->ShifterOperandCanHold(SUB, path_to_root)) {
7153 // Compare the bitstring bits using SUB.
7154 __ Sub(temp, temp, path_to_root);
7160 // MOVW+SUB(register) would be 8 bytes unless we find a low-reg temporary but the
7162 // Compare the bitstring bits using SUB.
7163 __ Sub(temp, temp, path_to_root & 0x00ffu); // 16-bit SUB (immediate) T2
7164 __ Sub(temp, temp, path_to_root & 0xff00u); // 32-bit SUB (immediate) T3
7174 __ Sub(temp, temp, path_to_root);
7184 __ Sub(temp, temp, path_to_root << (32u - mask_bits));
7658 // it would make sense to use CMP+MOV+IT+MOV instead of SUB+CLZ+LSR as the code size
7876 __ Sub(RegisterFrom(maybe_temp2_loc), RegisterFrom(maybe_temp2_loc), 2);
9172 __ Sub(key_reg, value_reg, lower_bound);
