Cross Reference: /art/compiler/optimizing/code_generator_vector_arm

Lines Matching refs:DRegisterFrom
26 using helpers::DRegisterFrom;
56   vixl32::DRegister dst = DRegisterFrom(locations->Out());
94   vixl32::DRegister src = DRegisterFrom(locations->InAt(0));
136   vixl32::DRegister src = DRegisterFrom(locations->InAt(0));
137   vixl32::DRegister dst = DRegisterFrom(locations->Out());
173   vixl32::DRegister src = DRegisterFrom(locations->InAt(0));
174   vixl32::DRegister dst = DRegisterFrom(locations->Out());
202   vixl32::DRegister src = DRegisterFrom(locations->InAt(0));
203   vixl32::DRegister dst = DRegisterFrom(locations->Out());
229   vixl32::DRegister src = DRegisterFrom(locations->InAt(0));
230   vixl32::DRegister dst = DRegisterFrom(locations->Out());
276   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
277   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
278   vixl32::DRegister dst = DRegisterFrom(locations->Out());
306   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
307   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
308   vixl32::DRegister dst = DRegisterFrom(locations->Out());
338   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
339   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
340   vixl32::DRegister dst = DRegisterFrom(locations->Out());
378   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
379   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
380   vixl32::DRegister dst = DRegisterFrom(locations->Out());
408   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
409   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
410   vixl32::DRegister dst = DRegisterFrom(locations->Out());
440   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
441   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
442   vixl32::DRegister dst = DRegisterFrom(locations->Out());
478   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
479   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
480   vixl32::DRegister dst = DRegisterFrom(locations->Out());
518   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
519   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
520   vixl32::DRegister dst = DRegisterFrom(locations->Out());
559   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
560   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
561   vixl32::DRegister dst = DRegisterFrom(locations->Out());
591   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
592   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
593   vixl32::DRegister dst = DRegisterFrom(locations->Out());
615   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
616   vixl32::DRegister rhs = DRegisterFrom(locations->InAt(1));
617   vixl32::DRegister dst = DRegisterFrom(locations->Out());
658   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
659   vixl32::DRegister dst = DRegisterFrom(locations->Out());
688   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
689   vixl32::DRegister dst = DRegisterFrom(locations->Out());
718   vixl32::DRegister lhs = DRegisterFrom(locations->InAt(0));
719   vixl32::DRegister dst = DRegisterFrom(locations->Out());
764   vixl32::DRegister dst = DRegisterFrom(locations->Out());
823   vixl32::DRegister acc = DRegisterFrom(locations->InAt(0));
824   vixl32::DRegister left = DRegisterFrom(locations->InAt(1));
825   vixl32::DRegister right = DRegisterFrom(locations->InAt(2));
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