Lines Matching refs:RegSet
115 RegSet (ComPhyAddr + COMMON_PHY_CFG1_REG, Data, Mask);
122 RegSet (ComPhyAddr + COMMON_PHY_CFG1_REG, Data, Mask);
153 RegSet (HpipeAddr + HPIPE_RST_CLK_CTRL_REG, Data, Mask);
156 RegSet (HpipeAddr + HPIPE_CLK_SRC_LO_REG,
161 RegSet (HpipeAddr + HPIPE_CLK_SRC_HI_REG,
165 RegSet (HpipeAddr + HPIPE_LANE_EQ_CFG1_REG,
169 RegSet (HpipeAddr + HPIPE_DFE_CTRL_28_REG,
193 RegSet (HpipeAddr + HPIPE_MISC_REG, Data, Mask);
208 RegSet (HpipeAddr + HPIPE_PWR_PLL_REG, Data, Mask);
215 RegSet (HpipeAddr + HPIPE_GLOBAL_PM_CTRL,
226 RegSet (HpipeAddr + HPIPE_INTERFACE_REG, Data, Mask);
235 RegSet (HpipeAddr + HPIPE_PCIE_REG0, Data, Mask);
248 RegSet (HpipeAddr + HPIPE_TX_TRAIN_CTRL_REG, Data, Mask);
257 RegSet (HpipeAddr + HPIPE_TX_TRAIN_REG, Data, Mask);
267 RegSet (HpipeAddr + HPIPE_RST_CLK_CTRL_REG,
348 RegSet (ComPhyAddr + COMMON_PHY_CFG1_REG, Data, Mask);
355 RegSet (ComPhyAddr + COMMON_PHY_CFG1_REG, Data, Mask);
385 RegSet (HpipeAddr + HPIPE_RST_CLK_CTRL_REG, Data, Mask);
388 RegSet (HpipeAddr + HPIPE_CLK_SRC_LO_REG,
393 RegSet (HpipeAddr + HPIPE_MISC_REG, 0x0 << HPIPE_MISC_REFCLK_SEL_OFFSET,
403 RegSet (HpipeAddr + HPIPE_PWR_PLL_REG, Data, Mask);
406 RegSet (HpipeAddr + HPIPE_GLOBAL_PM_CTRL,
411 RegSet (HpipeAddr + HPIPE_INTERFACE_REG,
415 RegSet (HpipeAddr + HPIPE_LOOPBACK_REG,
438 RegSet (HpipeAddr + HPIPE_LANE_CFG4_REG, Data, Mask);
471 RegSet (HpipeAddr + HPIPE_RST_CLK_CTRL_REG,
524 RegSet (SataBase + SATA3_VENDOR_ADDRESS,
542 RegSet (SataBase + SATA3_VENDOR_DATA, Data, Mask);
563 RegSet (ComPhyAddr + COMMON_PHY_CFG1_REG, Data, Mask);
566 RegSet (ComPhyAddr + COMMON_PHY_CFG6_REG,
574 RegSet (SdIpAddr + SD_EXTERNAL_CONFIG1_REG, Data, Mask);
590 RegSet (HpipeAddr + HPIPE_MISC_REG,
600 RegSet (HpipeAddr + HPIPE_PWR_PLL_REG, Data, Mask);
603 RegSet (HpipeAddr + HPIPE_INTERFACE_REG,
607 RegSet (HpipeAddr + HPIPE_LOOPBACK_REG,
618 RegSet (HpipeAddr + HPIPE_PWR_CTR_REG,
620 RegSet (HpipeAddr + HPIPE_PWR_CTR_REG,
624 RegSet (HpipeAddr + HPIPE_PWR_CTR_REG,
626 RegSet (HpipeAddr + HPIPE_PWR_CTR_REG,
642 RegSet (SataBase + SATA3_VENDOR_ADDRESS,
660 RegSet (SataBase + SATA3_VENDOR_DATA, Data, Mask);
663 RegSet (SataBase + SATA3_VENDOR_ADDRESS,
668 RegSet (SataBase + SATA3_VENDOR_DATA, 0x1 << SATA_MBUS_REGRET_EN_OFFSET,
761 RegSet (ComPhyAddr + COMMON_PHY_CFG1_REG, Data, Mask);
782 RegSet (SdIpAddr + SD_EXTERNAL_CONFIG0_REG, Data, Mask);
791 RegSet (SdIpAddr + SD_EXTERNAL_CONFIG1_REG, Data, Mask);
798 RegSet (SdIpAddr+ SD_EXTERNAL_CONFIG1_REG, Data, Mask);
816 RegSet (HpipeAddr + HPIPE_MISC_REG, Data, Mask);
823 RegSet (HpipeAddr + HPIPE_PWR_PLL_REG, Data, Mask);
828 RegSet (HpipeAddr + HPIPE_LOOPBACK_REG, Data, Mask);
835 RegSet (HpipeAddr + HPIPE_RX_CONTROL_1_REG, Data, Mask);
840 RegSet (HpipeAddr + HPIPE_PWR_CTR_DTL_REG, Data, Mask);
860 RegSet (SdIpAddr + SD_EXTERNAL_CONFIG0_REG, Data, Mask);
879 RegSet (SdIpAddr + SD_EXTERNAL_CONFIG1_REG, Data, Mask);
896 RegSet (SdIpAddr + SD_EXTERNAL_CONFIG1_REG, Data, Mask);
926 RegSet (HpipeAddr + HPIPE_G1_SET_0_REG,
