Lines Matching refs:PLL_CONS
117 plls_con[pll_id][0] = mmio_read_32(CRU_BASE + PLL_CONS((pll_id), 0));
118 plls_con[pll_id][1] = mmio_read_32(CRU_BASE + PLL_CONS((pll_id), 1));
119 plls_con[pll_id][2] = mmio_read_32(CRU_BASE + PLL_CONS((pll_id), 2));
120 plls_con[pll_id][3] = mmio_read_32(CRU_BASE + PLL_CONS((pll_id), 3));
122 mmio_write_32(CRU_BASE + PLL_CONS((pll_id), 3), PLL_SLOW_BITS);
123 mmio_write_32(CRU_BASE + PLL_CONS((pll_id), 3), PLL_BYPASS);
137 mmio_write_32(CRU_BASE + PLL_CONS(ABPLL_ID, 3),
139 mmio_write_32(CRU_BASE + PLL_CONS(ALPLL_ID, 3),
141 mmio_write_32(CRU_BASE + PLL_CONS(GPLL_ID, 3),
143 mmio_write_32(CRU_BASE + PLL_CONS(CPLL_ID, 3),
145 mmio_write_32(CRU_BASE + PLL_CONS(NPLL_ID, 3),
165 mmio_write_32(CRU_BASE + PLL_CONS(ABPLL_ID, 3),
167 mmio_write_32(CRU_BASE + PLL_CONS(ALPLL_ID, 3),
169 mmio_write_32(CRU_BASE + PLL_CONS(GPLL_ID, 3),
171 mmio_write_32(CRU_BASE + PLL_CONS(CPLL_ID, 3),
173 mmio_write_32(CRU_BASE + PLL_CONS(NPLL_ID, 3),
181 mmio_write_32(CRU_BASE + PLL_CONS((GPLL_ID), 3), PLL_SLOW_BITS);
182 mmio_write_32(CRU_BASE + PLL_CONS((CPLL_ID), 3), PLL_SLOW_BITS);
183 mmio_write_32(CRU_BASE + PLL_CONS((NPLL_ID), 3), PLL_SLOW_BITS);
184 mmio_write_32(CRU_BASE + PLL_CONS((ABPLL_ID), 3), PLL_SLOW_BITS);
185 mmio_write_32(CRU_BASE + PLL_CONS((ALPLL_ID), 3), PLL_SLOW_BITS);
