Lines Matching refs:IdeRegsBaseAddr
271 @param IdeRegsBaseAddr Pointer to IDE_REGISTERS_BASE_ADDR to
282 OUT IDE_REGISTERS_BASE_ADDR *IdeRegsBaseAddr
301 IdeRegsBaseAddr[IdePrimary].CommandBlockBaseAddr = 0x1f0;
302 IdeRegsBaseAddr[IdePrimary].ControlBlockBaseAddr = 0x3f6;
303 IdeRegsBaseAddr[IdePrimary].BusMasterBaseAddr =
314 IdeRegsBaseAddr[IdePrimary].CommandBlockBaseAddr =
316 IdeRegsBaseAddr[IdePrimary].ControlBlockBaseAddr =
318 IdeRegsBaseAddr[IdePrimary].BusMasterBaseAddr =
323 IdeRegsBaseAddr[IdeSecondary].CommandBlockBaseAddr = 0x170;
324 IdeRegsBaseAddr[IdeSecondary].ControlBlockBaseAddr = 0x376;
325 IdeRegsBaseAddr[IdeSecondary].BusMasterBaseAddr =
336 IdeRegsBaseAddr[IdeSecondary].CommandBlockBaseAddr =
338 IdeRegsBaseAddr[IdeSecondary].ControlBlockBaseAddr =
340 IdeRegsBaseAddr[IdeSecondary].BusMasterBaseAddr =
366 IDE_REGISTERS_BASE_ADDR IdeRegsBaseAddr[IdeMaxChannel];
378 Status = GetIdeRegistersBaseAddr (IdeDev->PciIo, IdeRegsBaseAddr);
384 CommandBlockBaseAddr = IdeRegsBaseAddr[IdeDev->Channel].CommandBlockBaseAddr;
385 ControlBlockBaseAddr = IdeRegsBaseAddr[IdeDev->Channel].ControlBlockBaseAddr;
400 IdeDev->IoPort->BusMasterBaseAddr = IdeRegsBaseAddr[IdeDev->Channel].BusMasterBaseAddr;
