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Lines Matching refs:MmioWrite32

145   MmioWrite32 (CM_ICLKEN_DSS, EN_DSS);

151   MmioWrite32 (CM_CLKSEL_DSS, 0x1000 | (LcdModes[ModeNumber].DssDivisor));

160   MmioWrite32(DSS_SYSCONFIG, DSS_SOFTRESET);

164   MmioWrite32 (DISPC_SIZE_LCD,

168   MmioWrite32 (DISPC_TIMING_H,

173   MmioWrite32 (DISPC_TIMING_V,

184   MmioWrite32(DISPC_DIVISOR, ((1 << 16) | LcdModes[ModeNumber].DispcDivisor) );

187   MmioWrite32 (DISPC_GFX_PRELD, 0x2D8);

188   MmioWrite32 (DISPC_GFX_BA0, VramBaseAddress);

189   MmioWrite32 (DISPC_GFX_SIZE,

194   MmioWrite32(DISPC_GFX_ATTR, (GFXENABLE | RGB16 | BURSTSIZE16));