Lines Matching refs:BIT0
64 #define B_PCH_SMBUS_PCICMD_IOSE BIT0 // I/O Space Enable
68 #define B_PCH_SMBUS_BASE_IOSI BIT0 // IO Space Indicator
86 #define B_PCH_SMBUS_HBSY BIT0 // Host Busy
102 #define B_PCH_SMBUS_INTREN BIT0 // Interrupt Enable
109 #define B_PCH_SMBUS_RW_SEL BIT0 // Direction of the host transfer, 1 = read, 0 = write
124 #define B_PCH_SMBUS_CRCE BIT0 // CRC Error
128 #define B_PCH_SMBUS_AAC BIT0 // Automatically Append CRC
133 #define B_PCH_SMBUS_SMLINK0_CUR_STS BIT0 // Not supported
139 #define B_PCH_SMBUS_SMBCLK_CUR_STS BIT0 // SMBCLK Current Status
142 #define B_PCH_SMBUS_HOST_NOTIFY_STS BIT0 // Host Notify Status
147 #define B_PCH_SMBUS_HOST_NOTIFY_INTREN BIT0 // Host Notify Interrupt Enable
