Home | History | Annotate | Download | only in Serialization

Lines Matching refs:SubmoduleIDs

2417   llvm::DenseMap<Module *, unsigned>::iterator Known = SubmoduleIDs.find(Mod);
2418 if (Known != SubmoduleIDs.end())
2424 return SubmoduleIDs[Mod] = NextSubmoduleID++;
2549 assert(SubmoduleIDs[Mod->Parent] && "Submodule parent not written?");
2550 ParentID = SubmoduleIDs[Mod->Parent];
4591 assert(SubmoduleIDs.find(I->getImportedModule()) != SubmoduleIDs.end());
4592 Imports.push_back(ModuleInfo(SubmoduleIDs[I->getImportedModule()],
5635 assert(SubmoduleIDs.find(Mod) == SubmoduleIDs.end());
5636 SubmoduleIDs[Mod] = ID;