Lines Matching refs:Op
164 for (const SDValue &Op : N->op_values()) {
165 if (Op.isUndef())
177 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
180 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
197 for (const SDValue &Op : N->op_values()) {
198 if (Op.isUndef())
200 if (!isa<ConstantSDNode>(Op))
210 for (const SDValue &Op : N->op_values()) {
211 if (Op.isUndef())
213 if (!isa<ConstantFPSDNode>(Op))
226 for (const SDValue &Op : N->op_values())
227 if (!Op.isUndef())
258 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
259 unsigned Operation = Op;
297 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
301 if (Op > ISD::SETTRUE2)
302 Op &= ~16; // Clear the U bit if the N bit is set.
305 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
306 Op = ISD::SETNE;
308 return ISD::CondCode(Op);
355 for (auto& Op : Ops) {
356 ID.AddPointer(Op.getNode());
357 ID.AddInteger(Op.getResNo());
365 for (auto& Op : Ops) {
366 ID.AddPointer(Op.getNode());
367 ID.AddInteger(Op.getResNo());
818 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
823 SDValue Ops[] = { Op };
1001 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
1002 return VT.bitsGT(Op.getValueType()) ?
1003 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1004 getNode(ISD::TRUNCATE, DL, VT, Op);
1007 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
1008 return VT.bitsGT(Op.getValueType()) ?
1009 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1010 getNode(ISD::TRUNCATE, DL, VT, Op);
1013 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
1014 return VT.bitsGT(Op.getValueType()) ?
1015 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1016 getNode(ISD::TRUNCATE, DL, VT, Op);
1019 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT,
1021 if (VT.bitsLE(Op.getValueType()))
1022 return getNode(ISD::TRUNCATE, SL, VT, Op);
1025 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1028 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) {
1032 if (Op.getValueType() == VT) return Op;
1033 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1036 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1037 getConstant(Imm, DL, Op.getValueType()));
1040 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, const SDLoc &DL,
1043 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1046 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1048 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1051 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, const SDLoc &DL,
1054 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1057 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1059 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1062 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, const SDLoc &DL,
1065 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1068 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1070 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1808 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1809 EVT OpTy = Op.getValueType();
1811 if (OpTy == ShTy || OpTy.isVector()) return Op;
1813 return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
2000 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
2002 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
2004 if (Op.getValueType().isVector())
2007 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2008 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
2014 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
2017 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2021 /// Determine which bits of Op are known to be either zero or one and return
2023 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
2025 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2033 switch (Op.getOpcode()) {
2036 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
2041 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2042 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2050 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2051 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2059 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2060 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2070 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2071 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2094 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2099 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2109 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2110 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2117 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2118 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2130 if (Op.getResNo() != 1)
2136 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2143 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2150 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2157 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2166 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2173 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2182 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2193 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2209 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2225 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2254 LoadSDNode *LD = cast<LoadSDNode>(Op);
2256 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2267 EVT InVT = Op.getOperand(0).getValueType();
2272 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2279 EVT InVT = Op.getOperand(0).getValueType();
2285 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2302 EVT InVT = Op.getOperand(0).getValueType();
2306 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2312 EVT InVT = Op.getOperand(0).getValueType();
2316 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2322 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2324 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2335 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2343 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2366 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2370 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2376 if (Op.getOpcode() == ISD::ADD) {
2392 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2396 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2416 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2420 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2431 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2432 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2441 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2443 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2444 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2456 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2467 computeKnownBits(Op.getOperand(0), Op0Zero, Op0One, Depth);
2468 computeKnownBits(Op.getOperand(1), Op1Zero, Op1One, Depth);
2476 if (unsigned Align = InferPtrAlignment(Op)) {
2484 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2491 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2527 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const {
2528 EVT VT = Op.getValueType();
2537 switch (Op.getOpcode()) {
2540 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2543 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2547 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2553 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2554 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2559 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2562 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2566 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2568 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2574 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2576 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2586 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2588 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2597 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2599 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2602 Tmp = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2604 Tmp2 = ComputeNumSignBits(Op.getOperand(3), Depth+1);
2610 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
2613 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
2621 if (Op.getResNo() != 1)
2627 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2633 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2639 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2643 if (Op.getOpcode() == ISD::ROTR)
2648 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2655 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2659 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2662 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2675 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2680 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2684 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2687 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2703 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2711 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2712 const int BitWidth = Op.getValueType().getSizeInBits();
2714 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2719 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2728 if (Op.getResNo() == 0) {
2730 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2745 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2746 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2747 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2748 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2749 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2756 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2777 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2778 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2779 !isa<ConstantSDNode>(Op.getOperand(1)))
2782 if (Op.getOpcode() == ISD::OR &&
2783 !MaskedValueIsZero(Op.getOperand(0),
2784 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2790 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2796 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2804 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2806 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2810 switch (Op.getOpcode()) {
2813 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2851 if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); }))
2859 for (SDValue Op : Ops) {
2860 EVT OpVT = Op.getValueType();
2861 if (Op.isUndef())
2863 else if (Op.getOpcode() == ISD::BUILD_VECTOR)
2864 Elts.append(Op->op_begin(), Op->op_end());
2871 for (SDValue Op : Elts)
2872 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
2875 for (SDValue &Op : Elts)
2876 Op = DAG.getTargetLoweringInfo().isZExtFree(Op.getValueType(), SVT)
2877 ? DAG.getZExtOrTrunc(Op, DL, SVT)
2878 : DAG.getSExtOrTrunc(Op, DL, SVT);
3385 auto IsScalarOrSameVectorSize = [&](const SDValue &Op) {
3386 return !Op.getValueType().isVector() ||
3387 Op.getValueType().getVectorNumElements() == NumElts;
3390 auto IsConstantBuildVectorOrUndef = [&](const SDValue &Op) {
3391 BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Op);
3392 return (Op.isUndef()) || (Op.getOpcode() == ISD::CONDCODE) ||
3420 for (SDValue Op : Ops) {
3421 EVT InSVT = Op.getValueType().getScalarType();
3422 BuildVectorSDNode *InBV = dyn_cast<BuildVectorSDNode>(Op);
3425 if (Op.isUndef())
3428 ScalarOps.push_back(Op);
3658 SDValue Op = N1.getOperand(i);
3659 if (Op.isUndef()) {
3663 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
3849 return N1; // fold op(undef, arg2) -> undef
3857 return getConstant(0, DL, VT); // fold op(undef, arg2) -> 0
3882 return N2; // fold op(arg1, undef) -> undef
3896 return getConstant(0, DL, VT); // fold op(arg1, undef) -> 0
4839 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4868 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4920 "Invalid Atomic Op");
4934 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
5722 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5726 if (Op == N->getOperand(0)) return N;
5730 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5739 N->OperandList[0].set(Op);
6823 for (const SDValue &Op : N->op_values())
6824 if (*this == Op)
6830 for (const SDValue &Op : N->op_values())
6831 if (this == Op.getNode())
6901 // If ResNE is 0, fully unroll the vector op.
7091 void SelectionDAG::ExtractVectorElements(SDValue Op,
7094 EVT VT = Op.getValueType();
7100 SDLoc SL(Op);
7103 Op, getConstant(i, SL, IdxTy)));
7192 SDValue Op = getOperand(i);
7193 if (Op.isUndef()) {
7197 Splatted = Op;
7198 } else if (Splatted != Op) {
7241 for (const SDValue &Op : op_values()) {
7242 unsigned Opc = Op.getOpcode();
7299 for (const SDValue &Op : N->op_values())
7300 checkForCyclesHelper(Op.getNode(), Visited, Checked, DAG);
