Lines Matching refs:RegB
109 bool isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
115 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
119 unsigned RegA, unsigned RegB, unsigned Dist);
534 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
535 if (RegA == RegB)
537 if (!RegA || !RegB)
539 return TRI->regsOverlap(RegA, RegB);
546 isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
584 unsigned FromRegB = getMappedReg(regB, SrcRegMap);
590 // -RegB is not tied to a register and RegC is compatible with RegA.
591 // -RegB is tied to the wrong physical register, but RegC is.
592 // -RegB is tied to the wrong physical register, and RegC isn't tied.
596 // -RegC is not tied to a register and RegB is compatible with RegA.
597 // -RegC is tied to the wrong physical register, but RegB is.
598 // -RegC is tied to the wrong physical register, and RegB isn't tied.
609 // If there is a use of regB between its last def (could be livein) and this
612 if (!noUseAfterLastDef(regB, Dist, LastDefB))
633 if (isRevCopyChain(regB, regA, 3))
674 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){
681 unsigned FromRegB = getMappedReg(RegB, SrcRegMap);
693 unsigned RegA, unsigned RegB,
710 if (NewMI->findRegisterUseOperand(RegB, false, TRI))
712 // uses RegB, convertToThreeAddress must have created more
714 Sunk = sink3AddrInstruction(NewMI, RegB, mi);
726 DstRegMap.erase(RegB);
1218 unsigned regB = MI.getOperand(SrcIdx).getReg();
1220 assert(TargetRegisterInfo::isVirtualRegister(regB) &&
1222 bool regBKilled = isKilled(MI, regB, MRI, TII, LIS, true);
1243 // If there is one more use of regB later in the same MBB, consider
1245 if (!Commuted && EnableRescheduling && rescheduleMIBelowKill(mi, nmi, regB)) {
1250 // If we commuted, regB may have changed so we should re-sample it to avoid
1253 regB = MI.getOperand(SrcIdx).getReg();
1254 regBKilled = isKilled(MI, regB, MRI, TII, LIS, true);
1260 if (!regBKilled || isProfitableToConv3Addr(regA, regB)) {
1262 if (convertInstTo3Addr(mi, nmi, regA, regB, Dist)) {
1273 // If there is one more use of regB later in the same MBB, consider
1275 if (EnableRescheduling && rescheduleKillAboveMI(mi, nmi, regB)) {
1327 unsigned NewSrcIdx = NewMIs[1]->findRegisterUseOperandIdx(regB);
1456 unsigned RegB = 0;
1465 // Grab RegB from the instruction because it may have changed if the
1467 RegB = MI->getOperand(SrcIdx).getReg();
1470 if (RegA == RegB) {
1479 assert(TargetRegisterInfo::isVirtualRegister(RegB) &&
1497 MIB.addReg(RegB, 0, SubRegB);
1498 const TargetRegisterClass *RC = MRI->getRegClass(RegB);
1508 assert(TRI->getMatchingSuperReg(RegA, SubRegB, MRI->getRegClass(RegB))
1534 assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() &&
1543 TargetRegisterInfo::isVirtualRegister(RegB))
1552 SrcRegMap[RegA] = RegB;
1557 // Replace other (un-tied) uses of regB with LastCopiedReg.
1559 if (MO.isReg() && MO.getReg() == RegB && MO.getSubReg() == SubRegB &&
1571 // Update live variables for regB.
1572 if (RemovedKillFlag && LV && LV->getVarInfo(RegB).removeKill(*MI)) {
1575 LV->addVirtualRegisterKilled(RegB, *PrevMI);
1580 LiveInterval &LI = LIS->getInterval(RegB);
1583 assert(I != LI.end() && "RegB must be live-in to use.");
1591 // Some tied uses of regB matched their destination registers, so
1592 // regB is still used in this instruction, but a kill flag was
1593 // removed from a different tied use of regB, so now we need to add
1594 // a kill flag to one of the remaining uses of regB.
1596 if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) {
