Home | History | Annotate | Download | only in AMDGPU

Lines Matching refs:SUB

133   // ADD, SUB overflow.
623 case ISD::USUBO: return LowerUADDSUBO(Op, DAG, ISD::SUB, AMDGPUISD::BORROW);
977 SDValue BigShift = DAG.getNode(ISD::SUB, DL, VT, Shift, Width);
978 SDValue CompShift = DAG.getNode(ISD::SUB, DL, VT, Width1, Shift);
1015 SDValue BigShift = DAG.getNode(ISD::SUB, DL, VT, Shift, Width);
1016 SDValue CompShift = DAG.getNode(ISD::SUB, DL, VT, Width1, Shift);
1252 /// 16 bytes, (4 x 32bit sub-register), but we need to take into account the
1253 /// \p StackWidth, which tells us how many of the 4 sub-registrers will be used