Lines Matching defs:Address
52 // All possible address modes, plus some.
53 typedef struct Address {
66 // Innocuous defaults for our address.
67 Address()
71 } Address;
165 bool ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
168 bool ARMEmitStore(MVT VT, unsigned SrcReg, Address &Addr,
170 bool ARMComputeAddress(const Value *Obj, Address &Addr);
171 void ARMSimplifyAddress(Address &Addr, MVT VT, bool useAM3);
173 bool ARMTryEmitSmallMemCpy(Address Dest, Address Src, uint64_t Len,
210 void AddLoadStoreOperands(MVT VT, Address &Addr,
716 // Computes the address to get to an object.
717 bool ARMFastISel::ARMComputeAddress(const Value *Obj, Address &Addr) {
737 // address spaces.
758 Address SavedAddr = Addr;
809 Addr.BaseType = Address::FrameIndexBase;
822 void ARMFastISel::ARMSimplifyAddress(Address &Addr, MVT VT, bool useAM3) {
850 // put the alloca address into a register, set the base type back to
852 if (needsLowering && Addr.BaseType == Address::FrameIndexBase) {
862 Addr.BaseType = Address::RegBase;
874 void ARMFastISel::AddLoadStoreOperands(MVT VT, Address &Addr,
883 if (Addr.BaseType == Address::FrameIndexBase) {
919 bool ARMFastISel::ARMEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
1046 // See if we can handle this address.
1047 Address Addr;
1057 bool ARMFastISel::ARMEmitStore(MVT VT, unsigned SrcReg, Address &Addr,
1180 // See if we can handle this address.
1181 Address Addr;
2003 Address Addr;
2004 Addr.BaseType = Address::RegBase;
2428 bool ARMFastISel::ARMTryEmitSmallMemCpy(Address Dest, Address Src,
2488 // Recursively load frame address
2520 Address Dest, Src;
2923 // See if we can handle this address.
2924 Address Addr;
2959 // Fix the address by adding pc.
