Lines Matching refs:Rt
598 // BOVC if rs >= rt
599 // BEQZALC if rs == 0 && rt != 0
600 // BEQC if rs < rt && rs != 0
603 InsnType Rt = fieldFromInstruction(insn, 16, 5);
607 if (Rs >= Rt) {
610 } else if (Rs != 0 && Rs < Rt) {
621 Rt)));
631 InsnType Rt = fieldFromInstruction(insn, 21, 5);
635 if (Rs >= Rt) {
638 Rt)));
641 } else if (Rs != 0 && Rs < Rt) {
646 Rt)));
650 Rt)));
668 // BNVC if rs >= rt
669 // BNEZALC if rs == 0 && rt != 0
670 // BNEC if rs < rt && rs != 0
673 InsnType Rt = fieldFromInstruction(insn, 16, 5);
677 if (Rs >= Rt) {
680 } else if (Rs != 0 && Rs < Rt) {
691 Rt)));
701 InsnType Rt = fieldFromInstruction(insn, 21, 5);
705 if (Rs >= Rt) {
708 Rt)));
711 } else if (Rs != 0 && Rs < Rt) {
716 Rt)));
720 Rt)));
739 // BLEZC if rs == 0 && rt != 0
740 // BGEZC if rs == rt && rt != 0
741 // BGEC if rs != rt && rs != 0 && rt != 0
744 InsnType Rt = fieldFromInstruction(insn, 16, 5);
748 if (Rt == 0)
752 else if (Rs == Rt)
764 Rt)));
782 // BGTZC if rs == 0 && rt != 0
783 // BLTZC if rs == rt && rt != 0
784 // BLTC if rs != rt && rs != 0 && rt != 0
789 InsnType Rt = fieldFromInstruction(insn, 16, 5);
792 if (Rt == 0)
796 else if (Rs == Rt)
808 Rt)));
825 // BGTZ if rt == 0
826 // BGTZALC if rs == 0 && rt != 0
827 // BLTZALC if rs != 0 && rs == rt
828 // BLTUC if rs != 0 && rs != rt
831 InsnType Rt = fieldFromInstruction(insn, 16, 5);
836 if (Rt == 0) {
842 } else if (Rs == Rt) {
857 Rt)));
875 // BLEZALC if rs == 0 && rt != 0
876 // BGEZALC if rs == rt && rt != 0
877 // BGEUC if rs != rt && rs != 0 && rt != 0
880 InsnType Rt = fieldFromInstruction(insn, 16, 5);
884 if (Rt == 0)
888 else if (Rs == Rt)
899 Rt)));
1808 unsigned Rt = fieldFromInstruction(Insn, 16, 5);
1811 Rt = getReg(Decoder, Mips::GPR32RegClassID, Rt);
1815 Inst.addOperand(MCOperand::createReg(Rt));
1818 Inst.addOperand(MCOperand::createReg(Rt));
2281 // Invalid if rt == 0
2282 // BGTZALC_MMR6 if rs == 0 && rt != 0
2283 // BLTZALC_MMR6 if rs != 0 && rs == rt
2284 // BLTUC_MMR6 if rs != 0 && rs != rt
2286 InsnType Rt = fieldFromInstruction(insn, 21, 5);
2292 if (Rt == 0)
2298 else if (Rs == Rt) {
2314 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt)));
2328 // BLEZALC_MMR6 if rs == 0 && rt != 0
2329 // BGEZALC_MMR6 if rs == rt && rt != 0
2330 // BGEUC_MMR6 if rs != rt && rs != 0 && rt != 0
2332 InsnType Rt = fieldFromInstruction(insn, 21, 5);
2337 if (Rt == 0)
2341 else if (Rs == Rt)
2352 MCOperand::createReg(getReg(Decoder, Mips::GPR32RegClassID, Rt)));
