Lines Matching refs:SUB
70 setOperationAction(ISD::SUB, VecTys[i], Legal);
271 setOperationAction(ISD::SUB, Ty, Legal);
828 // return (sub constMult(x, ceil_c), constMult(x, ceil_c - c)).
831 return DAG.getNode(ISD::SUB, DL, VT, Op0, Op1);
2042 return DAG.getNode(ISD::SUB, SDLoc(Op), ResTy, Op->getOperand(1),
2148 return DAG.getNode(ISD::SUB, DL, Op->getValueType(0), Op->getOperand(1),
2154 return DAG.getNode(ISD::SUB, DL, Op->getValueType(0),
3069 // single-precision sub-register is also guaranteed to be even-numbered.
3306 BuildMI(*BB, MI, DL, TII->get(Subtarget.isABI_N64() ? Mips::DSUB : Mips::SUB),
