Lines Matching refs:SUB
308 setOperationAction(ISD::SUB, VT, Legal);
1779 if (N->getOpcode() == ISD::SUB &&
2388 return (Neg.getOpcode() == ISD::SUB &&
2402 Op = DAG.getNode(ISD::SUB, DL, Op.getValueType(),
2889 SDValue NewSP = DAG.getNode(ISD::SUB, DL, MVT::i64, OldSP, NeededSpace);
2962 Ops[1] = DAG.getNode(ISD::SUB, DL, VT, Ops[1], NegSum);
3244 SDValue NegBitShift = DAG.getNode(ISD::SUB, DL, WideVT,
3299 NegSrc2 = DAG.getNode(ISD::SUB, DL, MemVT, DAG.getConstant(0, DL, MemVT),
3348 SDValue NegBitShift = DAG.getNode(ISD::SUB, DL, WideVT,
