Lines Matching refs:OUT_PKT4
285 OUT_PKT4(ring, REG_A5XX_TPL1_TP_BORDER_COLOR_BASE_ADDR_LO, 2);
458 OUT_PKT4(ring, REG_A5XX_VFD_FETCH(j), 4);
463 OUT_PKT4(ring, REG_A5XX_VFD_DECODE(j), 2);
472 OUT_PKT4(ring, REG_A5XX_VFD_DEST_CNTL(j), 1);
480 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1);
503 OUT_PKT4(ring, REG_A5XX_RB_RENDER_COMPONENTS, 1);
521 OUT_PKT4(ring, REG_A5XX_RB_ALPHA_CONTROL, 1);
524 OUT_PKT4(ring, REG_A5XX_RB_STENCIL_CONTROL, 1);
541 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_CNTL, 1);
550 OUT_PKT4(ring, REG_A5XX_RB_STENCILREFMASK, 2);
561 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_CNTL, 1);
564 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_PLANE_CNTL, 1);
568 OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_PLANE_CNTL, 1);
576 OUT_PKT4(ring, REG_A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0, 2);
582 OUT_PKT4(ring, REG_A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0, 2);
596 OUT_PKT4(ring, REG_A5XX_GRAS_CL_VPORT_XOFFSET_0, 6);
612 OUT_PKT4(ring, REG_A5XX_GRAS_SU_CNTL, 1);
615 OUT_PKT4(ring, REG_A5XX_GRAS_SU_POINT_MINMAX, 2);
619 OUT_PKT4(ring, REG_A5XX_GRAS_SU_POLY_OFFSET_SCALE, 3);
624 OUT_PKT4(ring, REG_A5XX_PC_RASTER_CNTL, 1);
627 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1);
644 OUT_PKT4(ring, REG_A5XX_PC_PRIMITIVE_CNTL, 1);
660 OUT_PKT4(ring, REG_A5XX_RB_FS_OUTPUT_CNTL, 1);
664 OUT_PKT4(ring, REG_A5XX_SP_FS_OUTPUT_CNTL, 1);
688 OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO(i), 3);
693 OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(i), 3);
729 OUT_PKT4(ring, REG_A5XX_RB_MRT_CONTROL(i), 1);
732 OUT_PKT4(ring, REG_A5XX_RB_MRT_BLEND_CONTROL(i), 1);
736 OUT_PKT4(ring, REG_A5XX_RB_BLEND_CNTL, 1);
740 OUT_PKT4(ring, REG_A5XX_SP_BLEND_CNTL, 1);
747 OUT_PKT4(ring, REG_A5XX_RB_BLEND_RED, 8);
769 OUT_PKT4(ring, REG_A5XX_TPL1_VS_TEX_COUNT, 1);
778 OUT_PKT4(ring, REG_A5XX_TPL1_FS_TEX_COUNT, 1);
782 OUT_PKT4(ring, REG_A5XX_TPL1_CS_TEX_COUNT, 1);
809 OUT_PKT4(ring, REG_A5XX_TPL1_VS_TEX_COUNT, 1);
812 OUT_PKT4(ring, REG_A5XX_TPL1_HS_TEX_COUNT, 1);
815 OUT_PKT4(ring, REG_A5XX_TPL1_DS_TEX_COUNT, 1);
818 OUT_PKT4(ring, REG_A5XX_TPL1_GS_TEX_COUNT, 1);
821 OUT_PKT4(ring, REG_A5XX_TPL1_FS_TEX_COUNT, 1);
825 OUT_PKT4(ring, REG_A5XX_TPL1_CS_TEX_COUNT, 1);
847 OUT_PKT4(ring, REG_A5XX_HLSQ_UPDATE_CNTL, 1);
860 OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1);
863 OUT_PKT4(ring, REG_A5XX_PC_RASTER_CNTL, 1);
866 OUT_PKT4(ring, REG_A5XX_GRAS_SU_POINT_MINMAX, 2);
871 OUT_PKT4(ring, REG_A5XX_GRAS_SU_CONSERVATIVE_RAS_CNTL, 1);
874 OUT_PKT4(ring, REG_A5XX_GRAS_SC_SCREEN_SCISSOR_CNTL, 1);
877 OUT_PKT4(ring, REG_A5XX_SP_VS_CONFIG_MAX_CONST, 1);
880 OUT_PKT4(ring, REG_A5XX_SP_FS_CONFIG_MAX_CONST, 1);
883 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E292, 2);
887 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1);
890 OUT_PKT4(ring, REG_A5XX_RB_DBG_ECO_CNTL, 1);
893 OUT_PKT4(ring, REG_A5XX_VFD_MODE_CNTL, 1);
896 OUT_PKT4(ring, REG_A5XX_PC_MODE_CNTL, 1);
899 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1);
902 OUT_PKT4(ring, REG_A5XX_SP_DBG_ECO_CNTL, 1);
905 OUT_PKT4(ring, REG_A5XX_TPL1_MODE_CNTL, 1);
908 OUT_PKT4(ring, REG_A5XX_HLSQ_TIMEOUT_THRESHOLD_0, 2);
912 OUT_PKT4(ring, REG_A5XX_VPC_DBG_ECO_CNTL, 1);
915 OUT_PKT4(ring, REG_A5XX_HLSQ_MODE_CNTL, 1);
918 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1);
929 OUT_PKT4(ring, REG_A5XX_GRAS_SU_CONSERVATIVE_RAS_CNTL, 1);
932 OUT_PKT4(ring, REG_A5XX_GRAS_SC_BIN_CNTL, 1);
935 OUT_PKT4(ring, REG_A5XX_GRAS_SC_BIN_CNTL, 1);
938 OUT_PKT4(ring, REG_A5XX_VPC_FS_PRIMITIVEID_CNTL, 1);
941 OUT_PKT4(ring, REG_A5XX_VPC_SO_OVERRIDE, 1);
944 OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO(0), 3);
949 OUT_PKT4(ring, REG_A5XX_VPC_SO_FLUSH_BASE_LO(0), 2);
953 OUT_PKT4(ring, REG_A5XX_PC_GS_PARAM, 1);
956 OUT_PKT4(ring, REG_A5XX_PC_HS_PARAM, 1);
959 OUT_PKT4(ring, REG_A5XX_TPL1_TP_FS_ROTATION_CNTL, 1);
962 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E001, 1);
965 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E004, 1);
968 OUT_PKT4(ring, REG_A5XX_GRAS_SU_LAYERED, 1);
971 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E29A, 1);
974 OUT_PKT4(ring, REG_A5XX_VPC_SO_BUF_CNTL, 1);
977 OUT_PKT4
980 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E389, 1);
983 OUT_PKT4(ring, REG_A5XX_PC_GS_LAYERED, 1);
986 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5AB, 1);
989 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5C2, 1);
992 OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_BASE_LO(1), 3);
997 OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(1), 6);
1005 OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(2), 6);
1013 OUT_PKT4(ring, REG_A5XX_VPC_SO_BUFFER_OFFSET(3), 3);
1018 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E5DB, 1);
1021 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E600, 1);
1024 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E640, 1);
1027 OUT_PKT4(ring, REG_A5XX_TPL1_VS_TEX_COUNT, 4);
1033 OUT_PKT4(ring, REG_A5XX_TPL1_FS_TEX_COUNT, 2);
1037 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7C0, 3);
1042 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7C5, 3);
1047 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7CA, 3);
1052 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7CF, 3);
1057 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7D4, 3);
1062 OUT_PKT4(ring, REG_A5XX_UNKNOWN_E7D9, 3);
1067 OUT_PKT4(ring, REG_A5XX_RB_CLEAR_CNTL, 1);
