Lines Matching refs:OUT_PKT4
100 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(i), 5);
116 OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1);
125 OUT_PKT4(ring, REG_A5XX_RB_MRT_FLAG_BUFFER(i), 4);
153 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_BUFFER_INFO, 5);
164 OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO, 1);
167 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3);
173 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_BUFFER_BASE_LO, 3);
177 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_LO, 2);
180 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_BUFFER_BASE_LO, 3);
185 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_LO, 2);
200 OUT_PKT4(ring, REG_A5XX_RB_STENCIL_INFO, 5);
211 OUT_PKT4(ring, REG_A5XX_RB_STENCIL_INFO, 1);
215 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_BUFFER_INFO, 5);
222 OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO, 1);
225 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3);
230 OUT_PKT4(ring, REG_A5XX_RB_STENCIL_INFO, 1);
270 OUT_PKT4(ring, REG_A5XX_VSC_BIN_SIZE, 3);
275 OUT_PKT4(ring, REG_A5XX_UNKNOWN_0BC5, 2);
279 OUT_PKT4(ring, REG_A5XX_VSC_PIPE_CONFIG_REG(0), 16);
288 OUT_PKT4(ring, REG_A5XX_VSC_PIPE_DATA_ADDRESS_LO(0), 32);
298 OUT_PKT4(ring, REG_A5XX_VSC_PIPE_DATA_LENGTH_REG(0), 16);
319 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1);
323 OUT_PKT4(ring, REG_A5XX_GRAS_SC_WINDOW_SCISSOR_TL, 2);
329 OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_1, 2);
337 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1);
343 OUT_PKT4(ring, REG_A5XX_RB_WINDOW_OFFSET, 1);
364 OUT_PKT4(ring, REG_A5XX_VPC_MODE_CNTL, 1);
383 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1);
389 OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1);
392 OUT_PKT4(ring, REG_A5XX_VFD_POWER_CNTL, 1);
397 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1);
427 OUT_PKT4(ring, REG_A5XX_GRAS_SC_WINDOW_SCISSOR_TL, 2);
433 OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_1, 2);
458 OUT_PKT4(ring, REG_A5XX_RB_WINDOW_OFFSET, 1);
492 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5);
506 OUT_PKT4
512 OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_3, 5);
519 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1);
540 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1);
576 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1);
584 OUT_PKT4(ring, REG_A5XX_TPL1_TP_RAS_MSAA_CNTL, 2);
589 OUT_PKT4(ring, REG_A5XX_RB_RAS_MSAA_CNTL, 2);
594 OUT_PKT4(ring, REG_A5XX_GRAS_SC_RAS_MSAA_CNTL, 2);
624 OUT_PKT4(ring, REG_A5XX_RB_BLIT_FLAG_DST_LO, 4);
633 OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_3, 5);
640 OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1);
705 OUT_PKT4(ring, REG_A5XX_PC_POWER_CNTL, 1);
708 OUT_PKT4(ring, REG_A5XX_VFD_POWER_CNTL, 1);
713 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1);
716 OUT_PKT4(ring, REG_A5XX_GRAS_SC_WINDOW_SCISSOR_TL, 2);
722 OUT_PKT4(ring, REG_A5XX_RB_RESOLVE_CNTL_1, 2);
728 OUT_PKT4(ring, REG_A5XX_RB_WINDOW_OFFSET, 1);
735 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1);
746 OUT_PKT4(ring, REG_A5XX_TPL1_TP_RAS_MSAA_CNTL, 2);
751 OUT_PKT4(ring, REG_A5XX_RB_RAS_MSAA_CNTL, 2);
756 OUT_PKT4(ring, REG_A5XX_GRAS_SC_RAS_MSAA_CNTL, 2);
