Lines Matching defs:subOp
111 void emitSFnOp(const Instruction *, uint8_t subOp);
1320 if (i->subOp == 1) {
1487 CodeEmitterNV50::emitSFnOp(const Instruction *i, uint8_t subOp)
1498 code[1] = subOp << 29;
1502 assert(subOp == 6 && i->op == OP_EX2);
1712 switch (i->subOp) {
1719 assert(i->subOp == (NV50_IR_SUBOP_EMU_PRERET + 2));
1756 if (i->subOp >= NV50_IR_SUBOP_EMU_PRERET) {
1802 if (i->subOp == NV50_IR_SUBOP_BAR_SYNC)
1809 uint8_t subOp;
1810 switch (i->subOp) {
1811 case NV50_IR_SUBOP_ATOM_ADD: subOp = 0x0; break;
1812 case NV50_IR_SUBOP_ATOM_MIN: subOp = 0x7; break;
1813 case NV50_IR_SUBOP_ATOM_MAX: subOp = 0x6; break;
1814 case NV50_IR_SUBOP_ATOM_INC: subOp = 0x4; break;
1815 case NV50_IR_SUBOP_ATOM_DEC: subOp = 0x5; break;
1816 case NV50_IR_SUBOP_ATOM_AND: subOp = 0xa; break;
1817 case NV50_IR_SUBOP_ATOM_OR: subOp = 0xb; break;
1818 case NV50_IR_SUBOP_ATOM_XOR: subOp = 0xc; break;
1819 case NV50_IR_SUBOP_ATOM_CAS: subOp = 0x2; break;
1820 case NV50_IR_SUBOP_ATOM_EXCH: subOp = 0x1; break;
1822 assert(!"invalid subop");
1826 code[1] = 0xe0c00000 | (subOp << 2);
1834 if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
2025 emitQUADOP(insn, insn->lanes, insn->subOp);
