Lines Matching refs:PUSH_DATAh
80 PUSH_DATAh(push, screen->tls->offset);
87 PUSH_DATAh(push, screen->tls->size / screen->mp_count);
91 PUSH_DATAh(push, screen->tls->size / screen->mp_count);
106 PUSH_DATAh(push, screen->text->offset);
114 PUSH_DATAh(push, screen->txc->offset);
118 PUSH_DATAh(push, screen->txc->offset + 65536);
146 PUSH_DATAh(push, address + NVC0_CB_AUX_MS_INFO);
172 PUSH_DATAh(push, screen->parm->offset + NVE4_CP_INPUT_TRAP_INFO_PTR);
180 PUSH_DATAh(push, screen->parm->offset + NVE4_CP_PARAM_TRAP_INFO);
182 PUSH_DATAh(push, screen->tls->offset);
217 PUSH_DATAh(push, txc->offset + (tic->id * 32));
244 PUSH_DATAh(push, address + NVC0_CB_AUX_TEX_INFO(slot + 32));
274 PUSH_DATAh(push, address + NVC0_CB_AUX_SU_INFO(i));
345 PUSH_DATAh(push, address + NVC0_CB_AUX_TEX_INFO(i));
379 PUSH_DATAh(push, bo->offset + base);
398 PUSH_DATAh(push, address + NVC0_CB_AUX_UBO_INFO(i - 1));
407 PUSH_DATAh(push, res->address + nvc0->constbuf[s][i].offset);
432 PUSH_DATAh(push, address + NVC0_CB_AUX_BUF_INFO(0));
445 PUSH_DATAh(push, res->address + nvc0->buffers[s][i].buffer_offset);
502 PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_USR_INFO(5));
512 PUSH_DATAh(push, address + NVC0_CB_AUX_GRID_INFO(0));
651 PUSH_DATAh(push, gpuaddr);
720 PUSH_DATAh(push, desc_gpuaddr);
788 PUSH_DATAh(push, txc->offset + (tic->id * 32));
