Home | History | Annotate | Download | only in tests-mx32

Lines Matching refs:uaddr2

59 	int *uaddr2, unsigned long val3, int rc, const char *func, int line)
66 # define CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, \
71 (uaddr2), (val3)); \
79 (unsigned long) (timeout), (int *) (uaddr2), \
83 # define CHECK_FUTEX_ENOSYS(uaddr, op, val, timeout, uaddr2, val3, check) \
84 CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, 1)
86 # define CHECK_FUTEX(uaddr, op, val, timeout, uaddr2, val3, check) \
87 CHECK_FUTEX_GENERIC(uaddr, op, val, timeout, uaddr2, val3, check, 0)
176 TAIL_ALLOC_OBJECT_CONST_PTR(int, uaddr2);
182 uaddr2[0] = 0xbadf00d;
194 * 5. uaddr2 - not used
199 CHECK_FUTEX(NULL, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
206 CHECK_FUTEX(uaddr + 1, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
213 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout + 1, uaddr2, VAL3,
222 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
231 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2, VAL3,
240 /* uaddr is not as provided; uaddr2 is faulty but ignored */
241 CHECK_FUTEX(uaddr, FUTEX_WAIT, VAL, tmout, uaddr2 + 1, VAL3,
247 /* uaddr is not as provided; uaddr2 is faulty but ignored */
249 uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
260 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
268 VAL, tmout, uaddr2, 0, (rc == -1) && (errno == EAGAIN));
282 * 5. uaddr2 - not used
286 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1,
294 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1,
303 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1, 0,
311 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
321 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EAGAIN));
330 tmout, uaddr2 + 1, 0, (rc == -1) && (errno == EINVAL));
337 FUTEX_WAIT_BITSET, VAL, tmout, uaddr2 + 1, VAL3,
351 * 5. uaddr2 - not used
379 * 5. uaddr2 - not used
414 * 5. uaddr2 - not used
431 /* FUTEX_REQUEUE - wake val processes and re-queue rest on uaddr2
437 * 5. uaddr2 - another futex address, to re-queue waiting processes on
442 CHECK_FUTEX(uaddr, FUTEX_REQUEUE, VAL, VAL2, uaddr2, VAL3,
445 uaddr, VAL_PR, VAL2_PR, uaddr2, sprintrc(rc));
447 CHECK_FUTEX(uaddr, FUTEX_REQUEUE, VALP, VAL2P, uaddr2, VAL3,
450 uaddr, VALP_PR, VAL2P_PR, uaddr2, sprintrc(rc));
454 uaddr2, VAL3, (rc == 0) || ((rc == -1) && (errno == EINVAL)));
456 uaddr, VAL_PR, VAL2_PR, uaddr2, sprintrc(rc));
459 VAL2P, uaddr2, VAL3, (rc == 0));
461 uaddr, VALP_PR, VAL2P_PR, uaddr2, sprintrc(rc));
466 /* FUTEX_CMP_REQUEUE - wake val processes and re-queue rest on uaddr2
473 * 5. uaddr2 - another futex address, to re-queue waiting processes on
478 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VAL, VAL2, uaddr2, VAL3,
481 uaddr, VAL_PR, VAL2_PR, uaddr2, VAL3_PR, sprintrc(rc));
483 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VALP, VAL2P, uaddr2, VAL3,
486 uaddr, VALP_PR, VAL2P_PR, uaddr2, VAL3_PR, sprintrc(rc));
489 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VAL, VAL2, uaddr2, *uaddr,
492 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
494 CHECK_FUTEX(uaddr, FUTEX_CMP_REQUEUE, VALP, VAL2P, uaddr2, *uaddr,
497 uaddr, VALP_PR, VAL2P_PR, uaddr2, *uaddr, sprintrc(rc));
501 VAL2, uaddr2, *uaddr,
504 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
507 VAL2P, uaddr2, *uaddr, (rc == 0));
509 uaddr, VALP_PR, VAL2P_PR, uaddr2, *uaddr, sprintrc(rc));
515 * wake val2 processes waiting for uaddr2 in case
516 * operation encoded in val3 (change of value at uaddr2
518 * constant) succeedes with value at uaddr2. Operation
519 * result is written to value of uaddr2 (in any case).
525 * 5. uaddr2 - another futex address, for conditional wake of
532 * uaddr2. Values available (from 2005 up to
535 * applied to the old value stored in uaddr2
542 * uaddr2 is compared.
606 VAL, i, uaddr2, wake_ops[i].val,
620 i, uaddr2, wake_ops[i].str, sprintrc(rc));
640 * 5. uaddr2 - not used
646 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_LOCK_PI, VAL, tmout, uaddr2 + 1,
653 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
673 * 5. uaddr2 - not used
677 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_UNLOCK_PI, VAL, tmout, uaddr2 + 1,
682 tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
695 * 5. uaddr2 - not used
699 CHECK_FUTEX_ENOSYS(uaddr + 1, FUTEX_TRYLOCK_PI, VAL, tmout, uaddr2 + 1,
704 VAL, tmout, uaddr2 + 1, VAL3, (rc == -1) && (errno == EFAULT));
721 * 5. uaddr2 - (PI-aware) futex address to requeue process on
727 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_WAIT_REQUEUE_PI, VAL, tmout, uaddr2,
732 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
735 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
739 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
742 VAL, tmout, uaddr2, VAL3, (rc == -1) && (errno == EAGAIN));
746 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
749 FUTEX_WAIT_REQUEUE_PI, VAL, tmout, uaddr2, VAL3,
754 zero_extend_signed_to_ull(tmout->tv_nsec), uaddr2, sprintrc(rc));
763 * 5. uaddr2 - (PI-aware) futex address, to re-queue waiting processes
772 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_CMP_REQUEUE_PI, VAL, VAL2, uaddr2, VAL3,
775 uaddr, VAL_PR, VAL2_PR, uaddr2, VAL3_PR, sprintrc(rc));
777 CHECK_FUTEX_ENOSYS(uaddr, FUTEX_CMP_REQUEUE_PI, VAL, VAL2, uaddr2,
780 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
783 VAL, VAL2, uaddr2, *uaddr, (rc == -1) && (errno == EINVAL));
785 uaddr, VAL_PR, VAL2_PR, uaddr2, *uaddr, sprintrc(rc));
794 CHECK_FUTEX(uaddr, 0xd, VAL, tmout + 1, uaddr2 + 1, VAL3,
797 uaddr, VAL_PR, tmout + 1, uaddr2 + 1, VAL3_PR, sprintrc(rc));
799 CHECK_FUTEX(uaddr, 0xbefeeded, VAL, tmout + 1, uaddr2, VAL3,
802 uaddr, VAL_PR, tmout + 1, uaddr2, VAL3_PR, sprintrc(rc));