Lines Matching defs:RegIdx
345 VNInfo *SplitEditor::defValue(unsigned RegIdx,
351 LiveInterval *LI = Edit->get(RegIdx);
358 Values.insert(std::make_pair(std::make_pair(RegIdx, ParentVNI->id),
361 // This was the first time (RegIdx, ParentVNI) was mapped.
381 void SplitEditor::forceRecompute(unsigned RegIdx, const VNInfo *ParentVNI) {
383 ValueForcePair &VFP = Values[std::make_pair(RegIdx, ParentVNI->id)];
396 Edit->get(RegIdx)->addRange(LiveRange(Def, Def.getNextSlot(), VNI));
401 VNInfo *SplitEditor::defFromParent(unsigned RegIdx,
408 LiveInterval *LI = Edit->get(RegIdx);
411 // so always begin RegIdx 0 early and all others late.
412 bool Late = RegIdx != 0;
429 VNInfo *VNI = defValue(RegIdx, ParentVNI, Def);
638 unsigned RegIdx = AssignI.value();
640 DEBUG(dbgs() << " cannot find simple kill of RegIdx " << RegIdx << '\n');
641 forceRecompute(RegIdx, Edit->getParent().getVNInfoAt(Def));
705 // Get the complement interval, always RegIdx 0.
812 // RegAssign has holes where RegIdx 0 should be used.
816 unsigned RegIdx;
819 RegIdx = 0;
821 RegIdx = AssignI.value();
827 RegIdx = 0;
831 // The interval [Start;End) is continuously mapped to RegIdx, ParentVNI.
832 DEBUG(dbgs() << " [" << Start << ';' << End << ")=" << RegIdx);
833 LiveInterval *LI = Edit->get(RegIdx);
836 ValueForcePair VFP = Values.lookup(std::make_pair(RegIdx, ParentVNI->id));
852 LiveRangeCalc &LRC = getLRCalc(RegIdx);
854 // This value has multiple defs in RegIdx, but it wasn't rematerialized,
922 unsigned RegIdx = RegAssign.lookup(PHIVNI->def);
923 LiveInterval *LI = Edit->get(RegIdx);
924 LiveRangeCalc &LRC = getLRCalc(RegIdx);
933 assert(RegAssign.lookup(LastUse) == RegIdx &&
964 unsigned RegIdx = RegAssign.lookup(Idx);
965 LiveInterval *LI = Edit->get(RegIdx);
968 << Idx << ':' << RegIdx << '\t' << *MI);
986 getLRCalc(RegIdx).extend(LI, Idx.getNextSlot(), LIS.getSlotIndexes(),
1030 unsigned RegIdx = RegAssign.lookup(ParentVNI->def);
1031 VNInfo *VNI = defValue(RegIdx, ParentVNI, ParentVNI->def);
