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Lines Matching refs:MaskedCmpVal

1195   unsigned MaskedCmpVal = RegInfo.createVirtualRegister(RC);
1238   //    andi    maskedcmpval,cmpval,255
1239   //    sll     shiftedcmpval,maskedcmpval,shiftamt
1254   BuildMI(BB, dl, TII->get(Mips::ANDi), MaskedCmpVal)
1257     .addReg(ShiftAmt).addReg(MaskedCmpVal);