Lines Matching refs:PSHUFLW
2788 case X86ISD::PSHUFLW:
2847 case X86ISD::PSHUFLW:
3169 /// is suitable for input to PSHUFLW.
4077 /// the specified VECTOR_SHUFFLE mask with the PSHUFLW instruction.
4591 case X86ISD::PSHUFLW:
5427 // 1. [all] pshuflw, pshufhw, optional move
5430 // 4. [all] mov + pshuflw + pshufhw + N x (pextrw + pinsrw)
5523 bool pshuflw = AllWordsInNewV, pshufhw = AllWordsInNewV;
5533 pshuflw = false;
5541 // If we've eliminated the use of V2, and the new mask is a pshuflw or
5543 if ((pshufhw && InOrder[0]) || (pshuflw && InOrder[1])) {
5544 unsigned Opc = pshufhw ? X86ISD::PSHUFHW : X86ISD::PSHUFLW;
5604 // If BestLoQuad >= 0, generate a pshuflw to put the low elements in order,
5628 NewV = getTargetShuffleNode(X86ISD::PSHUFLW, dl, MVT::v8i16,
6772 return getTargetShuffleNode(X86ISD::PSHUFLW, dl, VT, V1,
10716 case X86ISD::PSHUFLW: return "X86ISD::PSHUFLW";
14247 case X86ISD::PSHUFLW:
