Lines Matching refs:UNDEF
91 // Extract from UNDEF is UNDEF.
92 if (Vec.getOpcode() == ISD::UNDEF)
93 return DAG.getNode(ISD::UNDEF, dl, ResultVT);
592 setOperationAction(ISD::UNDEF, MVT::f64, Expand);
619 setOperationAction(ISD::UNDEF, MVT::f64, Expand);
620 setOperationAction(ISD::UNDEF, MVT::f32, Expand);
645 setOperationAction(ISD::UNDEF, MVT::f80, Expand);
3090 /// isUndefOrInRange - Return true if Val is undef or if its value falls within
3098 /// range (L, L+Pos]. or is undef.
3107 /// isUndefOrEqual - Val is either less than zero (undef) or equal to the
3117 /// sequential range (L, L+Pos]. or is undef.
3149 // Lower quadword copied in order or undef.
3209 // All undef, not a palignr.
3449 /// of vector_shuffle v, v, <2, 3, 2, 3>, i.e. vector_shuffle v, undef,
3603 /// of vector_shuffle v, v, <0, 4, 1, 5>, i.e. vector_shuffle v, undef,
3646 /// of vector_shuffle v, v, <2, 6, 3, 7>, i.e. vector_shuffle v, undef,
3808 // they can differ if any of the corresponding index in a lane is undef
3838 // where a mask will match because the same mask element is undef on the
3914 // The second vector must be undef
3915 if (N->getOperand(1).getOpcode() != ISD::UNDEF)
3942 // The second vector must be undef
3943 if (N->getOperand(1).getOpcode() != ISD::UNDEF)
3969 bool V2IsUndef = N->getOperand(1).getOpcode() == ISD::UNDEF;
4277 if (Opc == ISD::UNDEF || ISD::isBuildVectorAllZeros(V2.getNode()))
4284 if (Opc == ISD::UNDEF || ISD::isBuildVectorAllZeros(V1.getNode()))
4336 SDValue InsV = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, MVT::v8i32),
4496 /// vector of zero or undef vector. This produces a shuffle where the low
4497 /// element of V2 is swizzled into the zero/undef vector, landing at element
4684 (Elt.getOpcode() == ISD::UNDEF || X86::isZeroNode(Elt))))
4703 // Ignore undef indicies
4980 /// Example: <load i32 *a, load i32 *a+4, undef, undef> -> zextload a
4983 /// rather than undef via VZEXT_LOAD, but we do not detect that case today.
4993 // For each element in the initializer, see if we've found a load or an undef.
5000 (Elt.getOpcode() != ISD::UNDEF && !ISD::isNON_EXTLoad(Elt.getNode())))
5003 if (Elt.getNode()->getOpcode() == ISD::UNDEF)
5009 if (Elt.getOpcode() == ISD::UNDEF)
5082 if (Elt.getOpcode() == ISD::UNDEF)
5096 // All undef vector. Return an UNDEF. All zero vectors were handled above.
5100 // Special case for single non-zero, non-undef, element.
5200 // shuffle (scalar_to_vector (load (ptr + 4))), undef, <0, 0, 0, 0>
5202 // shuffle (vload ptr)), undef, <1, 1, 1, 1>
5231 SDValue Vec = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), Lower,
5240 // One half is zero or undef.
5316 if (Op.getOperand(0).getOpcode() != ISD::UNDEF)
5322 if (Op.getOperand(i).getOpcode() == ISD::UNDEF) continue;
5330 // our (non-undef) elements to the full vector width with the element in the
5333 if (Op.getOperand(i).getOpcode() != ISD::UNDEF)
5346 // If V[i+EltStride] is undef and this is the first round of mixing,
5349 // inserted as undef can be dropped. This isn't safe for successive
5351 if (V[i+EltStride].getOpcode() == ISD::UNDEF &&
5402 SDValue V = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, ResVT), V1,
5441 Undef
5726 // undef mask values to 0x80 (zero out result) in the pshufb mask.
5777 // This word of the result is all undef, skip it.
6002 SDValue V = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), V1,
6305 if (V2.getOpcode() == ISD::UNDEF)
6455 V.getOperand(0).getOpcode() == ISD::UNDEF))
6558 bool V1IsUndef = V1.getOpcode() == ISD::UNDEF;
6559 bool V2IsUndef = V2.getOpcode() == ISD::UNDEF;
6688 // Canonicalize the splat or undef, if present, to be on the RHS.
6700 // Shuffling low element of v1 into undef, just return v1.
6744 if (V2.getOpcode() != ISD::UNDEF && isCommutedSHUFP(SVOp))
7113 return Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, OpVT), Op,
12435 // V UNDEF BUILD_VECTOR UNDEF
12443 V2.getOperand(1).getOpcode() != ISD::UNDEF ||
12444 V1.getOperand(1).getOpcode() != ISD::UNDEF)
12474 SDValue InsV = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT),
12482 SDValue InsV = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT),
13120 if (Arg.getOpcode() == ISD::UNDEF) continue;
13126 if (Arg.getOpcode() == ISD::UNDEF) continue;
13139 if (Arg.getOpcode() == ISD::UNDEF) continue;
13310 V1.getOperand(0).getOpcode() == ISD::UNDEF &&
13544 // TODO: It is possible to support ZExt by zeroing the undef values
13847 /// operands is UNDEF then the result is UNDEF.
13869 // LHS = VECTOR_SHUFFLE LHS, undef, <0, 1, ..., N-1>
13870 // NOTE: in what follows a default initialized SDValue represents an UNDEF of
13875 if (LHS.getOperand(0).getOpcode() != ISD::UNDEF)
13877 if (LHS.getOperand(1).getOpcode() != ISD::UNDEF)
13881 if (LHS.getOpcode() != ISD::UNDEF)
13892 if (RHS.getOperand(0).getOpcode() != ISD::UNDEF)
13894 if (RHS.getOperand(1).getOpcode() != ISD::UNDEF)
13898 if (RHS.getOpcode() != ISD::UNDEF)
13908 // If everything is UNDEF then bail out: it would be better to fold to UNDEF.
13930 // Ignore any UNDEF components.
13942 LHS = A.getNode() ? A : B; // If A is 'UNDEF', use B for it.
13943 RHS = B.getNode() ? B : A; // If B is 'UNDEF', use A for it.
