Lines Matching refs:VGPR0
91 unsigned VGPR0;493 assert(Reg >= RegisterEncoding.VGPR0 && Reg <= RegisterEncoding.VGPRL);494 Result.first = Reg - RegisterEncoding.VGPR0;1863 RegisterEncoding.VGPR0 = TRI->getEncodingValue(AMDGPU::VGPR0);1865 RegisterEncoding.VGPR0 + HardwareLimits.NumVGPRsMax - 1;