Lines Matching refs:DestSub0
4202 unsigned DestSub0 = MRI.createVirtualRegister(NewDestSubRC);
4203 BuildMI(MBB, MII, DL, InstDesc, DestSub0).add(SrcReg0Sub0);
4213 .addReg(DestSub0)
4235 unsigned DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);
4265 BuildMI(MBB, MII, DL, get(LoOpc), DestSub0)
4279 .addReg(DestSub0)
4329 unsigned DestSub0 = MRI.createVirtualRegister(NewDestSubRC);
4330 MachineInstr &LoHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub0)
4346 .addReg(DestSub0)
