Lines Matching refs:VAddr
221 // MUBUF and MTBUF have vaddr at different indices.
224 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::vaddr) ||
328 getNamedOperand(LdSt, AMDGPU::OpName::vaddr);
357 const MachineOperand *VAddr = getNamedOperand(LdSt, AMDGPU::OpName::vaddr);
358 if (VAddr) {
363 BaseReg = VAddr->getReg();
365 // scratch instructions have either vaddr or saddr.
1025 .addFrameIndex(FrameIndex) // vaddr
3671 MachineOperand *VAddr = getNamedOperand(MI, AMDGPU::OpName::vaddr);
3673 if (VAddr) {
3675 // extracted from the resource descriptor to the current value of VAddr.
3679 // NewVaddrLo = SRsrcPtr:sub0 + VAddr:sub0
3683 .addReg(VAddr->getReg(), 0, AMDGPU::sub0);
3685 // NewVaddrHi = SRsrcPtr:sub1 + VAddr:sub1
3688 .addReg(VAddr->getReg(), 0, AMDGPU::sub1);
3718 .addReg(AMDGPU::NoRegister) // Dummy value for vaddr.
3720 // with the new value of vaddr.
3745 .addReg(AMDGPU::NoRegister) // Dummy value for vaddr.
3747 // with the new value of vaddr.
3765 VAddr = getNamedOperand(*Addr64, AMDGPU::OpName::vaddr);
3770 VAddr->setReg(NewVAddr);
3909 const MachineOperand *VAddr = getNamedOperand(Inst, AMDGPU::OpName::soff);
3910 auto Add = MRI.getUniqueVRegDef(VAddr->getReg());
3914 // correctly if vaddr is negative.
3949 VAddr = getNamedOperand(*Add, SrcNames[!i]);
3960 .add(*VAddr) // vaddr
4714 const MachineOperand *Addr = getNamedOperand(MI, AMDGPU::OpName::vaddr);
