Lines Matching defs:CPSR
239 bool DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR);
252 // default CCReg argument. Sets CPSR if we're setting CPSR instead of CCR.
253 bool ARMFastISel::DefinesOptionalPredicate(MachineInstr *MI, bool *CPSR) {
257 // Look to see if our OptionalDef is defining CPSR or CCR.
260 if (MO.getReg() == ARM::CPSR)
261 *CPSR = true;
284 // CPSR defs that need to be added before the remaining operands. See s_cc_out
297 // defines CPSR. All other OptionalDefines in ARM are the CCR register.
298 bool CPSR = false;
299 if (DefinesOptionalPredicate(MI, &CPSR))
300 MIB.add(CPSR ? t1CondCodeOp() : condCodeOp());
1269 .addMBB(TBB).addImm(ARMPred).addReg(ARM::CPSR);
1292 .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1330 .addMBB(TBB).addImm(CCMode).addReg(ARM::CPSR);
1501 // ARMEmitCmp emits a FMSTAT when necessary, so it's always safe to use CPSR.
1504 .addImm(ARMPred).addReg(ARM::CPSR);
1688 .addReg(ARM::CPSR);
1696 .addReg(ARM::CPSR);
2707 // 16-bit Thumb instructions always set CPSR (unless they're in an IT block).
2719 // CPSR is set only by 16-bit Thumb instructions.
2735 MIB.addReg(ARM::CPSR, RegState::Define);
