Home | History | Annotate | Download | only in ARM

Lines Matching refs:NumVecs

11552     unsigned NumVecs = 0;
11558 NumVecs = 1; break;
11560 NumVecs = 2; break;
11562 NumVecs = 3; break;
11564 NumVecs = 4; break;
11572 NumVecs = 2; isLaneOp = true; break;
11574 NumVecs = 3; isLaneOp = true; break;
11576 NumVecs = 4; isLaneOp = true; break;
11578 NumVecs = 1; isLoadOp = false; break;
11580 NumVecs = 2; isLoadOp = false; break;
11582 NumVecs = 3; isLoadOp = false; break;
11584 NumVecs = 4; isLoadOp = false; break;
11586 NumVecs = 2; isLoadOp = false; isLaneOp = true; break;
11588 NumVecs = 3; isLoadOp = false; isLaneOp = true; break;
11590 NumVecs = 4; isLoadOp = false; isLaneOp = true; break;
11596 case ARMISD::VLD1DUP: NewOpc = ARMISD::VLD1DUP_UPD; NumVecs = 1; break;
11597 case ARMISD::VLD2DUP: NewOpc = ARMISD::VLD2DUP_UPD; NumVecs = 2; break;
11598 case ARMISD::VLD3DUP: NewOpc = ARMISD::VLD3DUP_UPD; NumVecs = 3; break;
11599 case ARMISD::VLD4DUP: NewOpc = ARMISD::VLD4DUP_UPD; NumVecs = 4; break;
11601 NumVecs = 1; isLaneOp = false; break;
11603 NumVecs = 1; isLaneOp = false; isLoadOp = false; break;
11618 unsigned NumBytes = NumVecs * VecTy.getSizeInBits() / 8;
11656 assert(NumVecs == 1 && "Unexpected multi-element generic load/store.");
11674 unsigned NumResultVecs = (isLoadOp ? NumVecs : 0);
11756 unsigned NumVecs = 0;
11760 NumVecs = 2;
11763 NumVecs = 3;
11766 NumVecs = 4;
11775 cast<ConstantSDNode>(VLD->getOperand(NumVecs+3))->getZExtValue();
11779 if (UI.getUse().getResNo() == NumVecs)
11790 for (n = 0; n < NumVecs; ++n)
11793 SDVTList SDTys = DAG.getVTList(makeArrayRef(Tys, NumVecs+1));
11805 if (ResNo == NumVecs)
11814 for (unsigned n = 0; n < NumVecs; ++n)
11816 VLDDupResults.push_back(SDValue(VLDDup.getNode(), NumVecs));