Lines Matching refs:OpNum
324 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
327 const MCOperand &MO1 = MI->getOperand(OpNum);
354 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum,
357 const MCOperand &MO1 = MI->getOperand(OpNum);
358 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
359 const MCOperand &MO3 = MI->getOperand(OpNum + 2);
374 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum,
377 const MCOperand &MO1 = MI->getOperand(OpNum);
378 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
464 unsigned OpNum,
467 const MCOperand &MO1 = MI->getOperand(OpNum);
468 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
534 unsigned OpNum,
537 const MCOperand &MO1 = MI->getOperand(OpNum);
538 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
552 void ARMInstPrinter::printPostIdxImm8Operand(const MCInst *MI, unsigned OpNum,
555 const MCOperand &MO = MI->getOperand(OpNum);
561 void ARMInstPrinter::printPostIdxRegOperand(const MCInst *MI, unsigned OpNum,
564 const MCOperand &MO1 = MI->getOperand(OpNum);
565 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
571 void ARMInstPrinter::printPostIdxImm8s4Operand(const MCInst *MI, unsigned OpNum,
574 const MCOperand &MO = MI->getOperand(OpNum);
580 void ARMInstPrinter::printLdStmModeOperand(const MCInst *MI, unsigned OpNum,
584 ARM_AM::getAM4SubMode(MI->getOperand(OpNum).getImm());
589 void ARMInstPrinter::printAddrMode5Operand(const MCInst *MI, unsigned OpNum,
592 const MCOperand &MO1 = MI->getOperand(OpNum);
593 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
596 printOperand(MI, OpNum, STI, O);
613 void ARMInstPrinter::printAddrMode5FP16Operand(const MCInst *MI, unsigned OpNum,
616 const MCOperand &MO1 = MI->getOperand(OpNum);
617 const MCOperand &MO2 = MI->getOperand(OpNum+1);
620 printOperand(MI, OpNum, STI, O);
640 void ARMInstPrinter::printAddrMode6Operand(const MCInst *MI, unsigned OpNum,
643 const MCOperand &MO1 = MI->getOperand(OpNum);
644 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
654 void ARMInstPrinter::printAddrMode7Operand(const MCInst *MI, unsigned OpNum,
657 const MCOperand &MO1 = MI->getOperand(OpNum);
664 unsigned OpNum,
667 const MCOperand &MO = MI->getOperand(OpNum);
677 unsigned OpNum,
680 const MCOperand &MO = MI->getOperand(OpNum);
689 void ARMInstPrinter::printMemBOption(const MCInst *MI, unsigned OpNum,
692 unsigned val = MI->getOperand(OpNum).getImm();
696 void ARMInstPrinter::printInstSyncBOption(const MCInst *MI, unsigned OpNum,
699 unsigned val = MI->getOperand(OpNum).getImm();
703 void ARMInstPrinter::printTraceSyncBOption(const MCInst *MI, unsigned OpNum,
706 unsigned val = MI->getOperand(OpNum).getImm();
710 void ARMInstPrinter::printShiftImmOperand(const MCInst *MI, unsigned OpNum,
713 unsigned ShiftOp = MI->getOperand(OpNum).getImm();
724 void ARMInstPrinter::printPKHLSLShiftImm(const MCInst *MI, unsigned OpNum,
727 unsigned Imm = MI->getOperand(OpNum).getImm();
734 void ARMInstPrinter::printPKHASRShiftImm(const MCInst *MI, unsigned OpNum,
737 unsigned Imm = MI->getOperand(OpNum).getImm();
745 void ARMInstPrinter::printRegisterList(const MCInst *MI, unsigned OpNum,
748 assert(std::is_sorted(MI->begin() + OpNum, MI->end(),
755 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
756 if (i != OpNum)
763 void ARMInstPrinter::printGPRPairOperand(const MCInst *MI, unsigned OpNum,
766 unsigned Reg = MI->getOperand(OpNum).getReg();
772 void ARMInstPrinter::printSetendOperand(const MCInst *MI, unsigned OpNum,
775 const MCOperand &Op = MI->getOperand(OpNum);
782 void ARMInstPrinter::printCPSIMod(const MCInst *MI, unsigned OpNum,
784 const MCOperand &Op = MI->getOperand(OpNum);
788 void ARMInstPrinter::printCPSIFlag(const MCInst *MI, unsigned OpNum,
790 const MCOperand &Op = MI->getOperand(OpNum);
800 void ARMInstPrinter::printMSRMaskOperand(const MCInst *MI, unsigned OpNum,
803 const MCOperand &Op = MI->getOperand(OpNum);
882 void ARMInstPrinter::printBankedRegOperand(const MCInst *MI, unsigned OpNum,
885 uint32_t Banked = MI->getOperand(OpNum).getImm();
896 void ARMInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNum,
899 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
908 unsigned OpNum,
911 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
915 void ARMInstPrinter::printSBitModifierOperand(const MCInst *MI, unsigned OpNum,
918 if (MI->getOperand(OpNum).getReg()) {
919 assert(MI->getOperand(OpNum).getReg() == ARM::CPSR &&
925 void ARMInstPrinter::printNoHashImmediate(const MCInst *MI, unsigned OpNum,
928 O << MI->getOperand(OpNum).getImm();
931 void ARMInstPrinter::printPImmediate(const MCInst *MI, unsigned OpNum,
934 O << "p" << MI->getOperand(OpNum).getImm();
937 void ARMInstPrinter::printCImmediate(const MCInst *MI, unsigned OpNum,
940 O << "c" << MI->getOperand(OpNum).getImm();
943 void ARMInstPrinter::printCoprocOptionImm(const MCInst *MI, unsigned OpNum,
946 O << "{" << MI->getOperand(OpNum).getImm() << "}";
949 void ARMInstPrinter::printPCLabel(const MCInst *MI, unsigned OpNum,
955 void ARMInstPrinter::printAdrLabelOperand(const MCInst *MI, unsigned OpNum,
958 const MCOperand &MO = MI->getOperand(OpNum);
977 void ARMInstPrinter::printThumbS4ImmOperand(const MCInst *MI, unsigned OpNum,
980 O << markup("<imm:") << "#" << formatImm(MI->getOperand(OpNum).getImm() * 4)
984 void ARMInstPrinter::printThumbSRImm(const MCInst *MI, unsigned OpNum,
987 unsigned Imm = MI->getOperand(OpNum).getImm();
992 void ARMInstPrinter::printThumbITMask(const MCInst *MI, unsigned OpNum,
996 unsigned Mask = MI->getOperand(OpNum).getImm();
997 unsigned Firstcond = MI->getOperand(OpNum - 1).getImm();
1083 void ARMInstPrinter::printT2SOOperand(const MCInst *MI, unsigned OpNum,
1086 const MCOperand &MO1 = MI->getOperand(OpNum);
1087 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1099 void ARMInstPrinter::printAddrModeImm12Operand(const MCInst *MI, unsigned OpNum,
1102 const MCOperand &MO1 = MI->getOperand(OpNum);
1103 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1106 printOperand(MI, OpNum, STI, O);
1128 unsigned OpNum,
1131 const MCOperand &MO1 = MI->getOperand(OpNum);
1132 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1152 unsigned OpNum,
1155 const MCOperand &MO1 = MI->getOperand(OpNum);
1156 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1159 printOperand(MI, OpNum, STI, O);
1183 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
1185 const MCOperand &MO1 = MI->getOperand(OpNum);
1186 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1198 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
1200 const MCOperand &MO1 = MI->getOperand(OpNum);
1213 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
1215 const MCOperand &MO1 = MI->getOperand(OpNum);
1231 unsigned OpNum,
1234 const MCOperand &MO1 = MI->getOperand(OpNum);
1235 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
1236 const MCOperand &MO3 = MI->getOperand(OpNum + 2);
1253 void ARMInstPrinter::printFPImmOperand(const MCInst *MI, unsigned OpNum,
1256 const MCOperand &MO = MI->getOperand(OpNum);
1261 void ARMInstPrinter::printNEONModImmOperand(const MCInst *MI, unsigned OpNum,
1264 unsigned EncodedImm = MI->getOperand(OpNum).getImm();
1272 void ARMInstPrinter::printImmPlusOneOperand(const MCInst *MI, unsigned OpNum,
1275 unsigned Imm = MI->getOperand(OpNum).getImm();
1279 void ARMInstPrinter::printRotImmOperand(const MCInst *MI, unsigned OpNum,
1282 unsigned Imm = MI->getOperand(OpNum).getImm();
1289 void ARMInstPrinter::printModImmOperand(const MCInst *MI, unsigned OpNum,
1292 MCOperand Op = MI->getOperand(OpNum);
1296 return printOperand(MI, OpNum, STI, O);
1305 PrintUnsigned = (MI->getOperand(OpNum - 1).getReg() == ARM::PC);
1330 void ARMInstPrinter::printFBits16(const MCInst *MI, unsigned OpNum,
1332 O << markup("<imm:") << "#" << 16 - MI->getOperand(OpNum).getImm()
1336 void ARMInstPrinter::printFBits32(const MCInst *MI, unsigned OpNum,
1338 O << markup("<imm:") << "#" << 32 - MI->getOperand(OpNum).getImm()
1342 void ARMInstPrinter::printVectorIndex(const MCInst *MI, unsigned OpNum,
1345 O << "[" << MI->getOperand(OpNum).getImm() << "]";
1348 void ARMInstPrinter::printVectorListOne(const MCInst *MI, unsigned OpNum,
1352 printRegName(O, MI->getOperand(OpNum).getReg());
1356 void ARMInstPrinter::printVectorListTwo(const MCInst *MI, unsigned OpNum,
1359 unsigned Reg = MI->getOperand(OpNum).getReg();
1369 void ARMInstPrinter::printVectorListTwoSpaced(const MCInst *MI, unsigned OpNum,
1372 unsigned Reg = MI->getOperand(OpNum).getReg();
1382 void ARMInstPrinter::printVectorListThree(const MCInst *MI, unsigned OpNum,
1389 printRegName(O, MI->getOperand(OpNum).getReg());
1391 printRegName(O, MI->getOperand(OpNum).getReg() + 1);
1393 printRegName(O, MI->getOperand(OpNum).getReg() + 2);
1397 void ARMInstPrinter::printVectorListFour(const MCInst *MI, unsigned OpNum,
1404 printRegName(O, MI->getOperand(OpNum).getReg());
1406 printRegName(O, MI->getOperand(OpNum).getReg() + 1);
1408 printRegName(O, MI->getOperand(OpNum).getReg() + 2);
1410 printRegName(O, MI->getOperand(OpNum).getReg() + 3);
1415 unsigned OpNum,
1419 printRegName(O, MI->getOperand(OpNum).getReg());
1424 unsigned OpNum,
1427 unsigned Reg = MI->getOperand(OpNum).getReg();
1438 unsigned OpNum,
1445 printRegName(O, MI->getOperand(OpNum).getReg());
1447 printRegName(O, MI->getOperand(OpNum).getReg() + 1);
1449 printRegName(O, MI->getOperand(OpNum).getReg() + 2);
1454 unsigned OpNum,
1461 printRegName(O, MI->getOperand(OpNum).getReg());
1463 printRegName(O, MI->getOperand(OpNum).getReg() + 1);
1465 printRegName(O, MI->getOperand(OpNum).getReg() + 2);
1467 printRegName(O, MI->getOperand(OpNum).getReg() + 3);
1472 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
1474 unsigned Reg = MI->getOperand(OpNum).getReg();
1485 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
1491 printRegName(O, MI->getOperand(OpNum).getReg());
1493 printRegName(O, MI->getOperand(OpNum).getReg() + 2);
1495 printRegName(O, MI->getOperand(OpNum).getReg() + 4);
1500 const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
1506 printRegName(O, MI->getOperand(OpNum).getReg());
1508 printRegName(O, MI->getOperand(OpNum).getReg() + 2);
1510 printRegName(O, MI->getOperand(OpNum).getReg() + 4);
1512 printRegName(O, MI->getOperand(OpNum).getReg() + 6);
1517 unsigned OpNum,
1524 printRegName(O, MI->getOperand(OpNum).getReg());
1526 printRegName(O, MI->getOperand(OpNum).getReg() + 2);
1528 printRegName(O, MI->getOperand(OpNum).getReg() + 4);
1532 void ARMInstPrinter::printVectorListFourSpaced(const MCInst *MI, unsigned OpNum,
1539 printRegName(O, MI->getOperand(OpNum).getReg());
1541 printRegName(O, MI->getOperand(OpNum).getReg() + 2);
1543 printRegName(O, MI->getOperand(OpNum).getReg() + 4);
1545 printRegName(O, MI->getOperand(OpNum).getReg() + 6);
