Lines Matching refs:f128
109 assert((LocVT == MVT::f32 || LocVT == MVT::f128
114 unsigned size = (LocVT == MVT::f128) ? 16 : 8;
115 unsigned alignment = (LocVT == MVT::f128) ? 16 : 8;
128 else if (LocVT == MVT::f128 && Offset < 16*8)
512 } else if (VA.getValVT() == MVT::f128) {
513 report_fatal_error("SPARCv8 does not handle f128 in calls; "
1095 if (!VA.isRegLoc() || (ValTy != MVT::f64 && ValTy != MVT::f128))
1118 assert(ValTy == MVT::f128 && "Unexpected type!");
1199 // fixupVariableFloatArgs() may create bitcasts from f128 to i128. But
1201 if (!VA.needsCustom() || VA.getValVT() != MVT::f128
1208 if (VA.needsCustom() && VA.getValVT() == MVT::f128
1468 addRegisterClass(MVT::f128, &SP::QFPRegsRegClass);
1522 setTruncStoreAction(MVT::f128, MVT::f32, Expand);
1523 setTruncStoreAction(MVT::f128, MVT::f64, Expand);
1569 setOperationAction(ISD::SELECT, MVT::f128, Expand);
1574 setOperationAction(ISD::SETCC, MVT::f128, Expand);
1583 setOperationAction(ISD::BR_CC, MVT::f128, Custom);
1588 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom);
1661 setOperationAction(ISD::FSIN , MVT::f128, Expand);
1662 setOperationAction(ISD::FCOS , MVT::f128, Expand);
1663 setOperationAction(ISD::FSINCOS, MVT::f128, Expand);
1664 setOperationAction(ISD::FREM , MVT::f128, Expand);
1665 setOperationAction(ISD::FMA , MVT::f128, Expand);
1681 setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand);
1684 setOperationAction(ISD::FPOW , MVT::f128, Expand);
1748 setOperationAction(ISD::LOAD, MVT::f128, Legal);
1749 setOperationAction(ISD::STORE, MVT::f128, Legal);
1751 setOperationAction(ISD::LOAD, MVT::f128, Custom);
1752 setOperationAction(ISD::STORE, MVT::f128, Custom);
1756 setOperationAction(ISD::FADD, MVT::f128, Legal);
1757 setOperationAction(ISD::FSUB, MVT::f128, Legal);
1758 setOperationAction(ISD::FMUL, MVT::f128, Legal);
1759 setOperationAction(ISD::FDIV, MVT::f128, Legal);
1760 setOperationAction(ISD::FSQRT, MVT::f128, Legal);
1761 setOperationAction(ISD::FP_EXTEND, MVT::f128, Legal);
1764 setOperationAction(ISD::FNEG, MVT::f128, Legal);
1765 setOperationAction(ISD::FABS, MVT::f128, Legal);
1767 setOperationAction(ISD::FNEG, MVT::f128, Custom);
1768 setOperationAction(ISD::FABS, MVT::f128, Custom);
1779 // Custom legalize f128 operations.
1781 setOperationAction(ISD::FADD, MVT::f128, Custom);
1782 setOperationAction(ISD::FSUB, MVT::f128, Custom);
1783 setOperationAction(ISD::FMUL, MVT::f128, Custom);
1784 setOperationAction(ISD::FDIV, MVT::f128, Custom);
1785 setOperationAction(ISD::FSQRT, MVT::f128, Custom);
1786 setOperationAction(ISD::FNEG, MVT::f128, Custom);
1787 setOperationAction(ISD::FABS, MVT::f128, Custom);
1789 setOperationAction(ISD::FP_EXTEND, MVT::f128, Custom);
2203 // Create a Stack Object to receive the return value of type f128.
2356 if (Op.getOperand(0).getValueType() != MVT::f128)
2377 // Expand f128 operations to fp128 abi calls.
2378 if (Op.getOperand(0).getValueType() == MVT::f128
2408 // Expand f128 operations to fp128 ABI calls.
2409 if (Op.getValueType() == MVT::f128
2433 // Expand if it does not involve f128 or the target has support for
2435 if (Op.getOperand(0).getValueType() != MVT::f128 ||
2455 // Expand if it does not involve f128 or the target has support for
2457 if (Op.getValueType() != MVT::f128 || (hasHardQuad && TLI.isTypeLegal(OpVT)))
2490 if (!hasHardQuad && LHS.getValueType() == MVT::f128) {
2526 if (!hasHardQuad && LHS.getValueType() == MVT::f128) {
2783 // Lower a f128 load into two f64 loads.
2809 dl, MVT::f128);
2811 MVT::f128,
2816 MVT::f128,
2832 if (MemVT == MVT::f128)
2838 // Lower a f128 store into two f64 stores.
2881 if (MemVT == MVT::f128)
2905 if (Op.getValueType() != MVT::f128)
2908 // Lower fabs/fneg on f128 to fabs/fneg on f64
2909 // fabs/fneg f128 => fabs/fneg f64:sub_even64, fmov f64:sub_odd64
2932 dl, MVT::f128), 0);
2933 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_even64, dl, MVT::f128,
2935 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_odd64, dl, MVT::f128,
3501 else if (VT == MVT::f128)
3510 else if (VT == MVT::f128)
3544 } else if (VT == MVT::f128 && (intVal % 4 == 0)) {
3577 // Custom lower only if it involves f128 or i64.
3578 if (N->getOperand(0).getValueType() != MVT::f128
3593 // Custom lower only if it involves f128 or i64.
3594 if (N->getValueType(0) != MVT::f128
