Lines Matching refs:X86ISD
341 if (User->getOpcode() == X86ISD::ADD ||
343 User->getOpcode() == X86ISD::SUB ||
473 if (Opcode == X86ISD::CMPM || Opcode == ISD::SETCC ||
474 Opcode == X86ISD::CMPM_RND || Opcode == X86ISD::VFPCLASS) {
485 if (Opcode == X86ISD::VFPCLASSS || Opcode == X86ISD::FSETCCM ||
486 Opcode == X86ISD::FSETCCM_RND)
519 case X86ISD::ADD:
520 case X86ISD::SUB:
521 case X86ISD::AND:
522 case X86ISD::XOR:
523 case X86ISD::OR:
566 if (Op1.getOpcode() == X86ISD::Wrapper) {
714 if (N->getOpcode() == X86ISD::AND && !N->hasAnyUseOfValue(1)) {
728 ((N->getOpcode() == X86ISD::CALL && !Subtarget->slowTwoMemOps()) ||
729 (N->getOpcode() == X86ISD::TC_RETURN &&
751 bool HasCallSeq = N->getOpcode() == X86ISD::CALL;
983 /// Try to match X86ISD::Wrapper and X86ISD::WrapperRIP nodes into an addressing
992 bool IsRIPRel = N.getOpcode() == X86ISD::WrapperRIP;
1375 case X86ISD::Wrapper:
1376 case X86ISD::WrapperRIP:
1460 case X86ISD::MUL_IMM:
1651 case X86ISD::Wrapper:
1708 Parent->getOpcode() != X86ISD::TLSCALL && // Fixme
1709 Parent->getOpcode() != X86ISD::EH_SJLJ_SETJMP && // setjmp
1710 Parent->getOpcode() != X86ISD::EH_SJLJ_LONGJMP) { // longjmp
1778 if (N.getOpcode() == X86ISD::VZEXT_LOAD) {
1804 if (N.getOpcode() == X86ISD::VZEXT_MOVL && N.getNode()->hasOneUse() &&
1835 if (N->getOpcode() != X86ISD::Wrapper)
2003 if (N.getOpcode() != X86ISD::Wrapper)
2068 if (N->getOpcode() != X86ISD::Wrapper)
2080 /// Test whether the given X86ISD::CMP node has any uses which require the SF
2357 case X86ISD::INC:
2358 case X86ISD::DEC:
2359 case X86ISD::ADD:
2360 case X86ISD::ADC:
2361 case X86ISD::SUB:
2362 case X86ISD::SBB:
2363 case X86ISD::AND:
2364 case X86ISD::OR:
2365 case X86ISD::XOR:
2398 case X86ISD::INC:
2399 case X86ISD::DEC: {
2401 Opc == X86ISD::INC
2409 case X86ISD::ADD:
2410 case X86ISD::ADC:
2411 case X86ISD::SUB:
2412 case X86ISD::SBB:
2413 case X86ISD::AND:
2414 case X86ISD::OR:
2415 case X86ISD::XOR: {
2418 case X86ISD::ADD:
2421 case X86ISD::ADC:
2424 case X86ISD::SUB:
2427 case X86ISD::SBB:
2430 case X86ISD::AND:
2433 case X86ISD::OR:
2435 case X86ISD::XOR:
2444 case X86ISD::ADD:
2446 case X86ISD::ADC:
2448 case X86ISD::SUB:
2450 case X86ISD::SBB:
2452 case X86ISD::AND:
2454 case X86ISD::OR:
2456 case X86ISD::XOR:
2464 case X86ISD::ADD:
2467 case X86ISD::ADC:
2470 case X86ISD::SUB:
2473 case X86ISD::SBB:
2476 case X86ISD::AND:
2479 case X86ISD::OR:
2482 case X86ISD::XOR:
2501 if ((Opc == X86ISD::ADD || Opc == X86ISD::SUB) &&
2508 Opc = Opc == X86ISD::ADD ? X86ISD::SUB : X86ISD::ADD;
2523 if (Opc == X86ISD::ADC || Opc == X86ISD::SBB) {
2606 SDValue New = CurDAG->getNode(X86ISD::BEXTR, dl, NVT,
2794 case X86ISD::GlobalBaseReg:
2798 case X86ISD::SELECT:
2799 case X86ISD::SHRUNKBLEND: {
2800 // SHRUNKBLEND selects like a regular VSELECT. Same with X86ISD::SELECT.
2901 case X86ISD::UMUL8:
2902 case X86ISD::SMUL8: {
2906 unsigned Opc = (Opcode == X86ISD::SMUL8 ? X86::IMUL8r : X86::MUL8r);
2919 case X86ISD::UMUL: {
2926 // MVT::i8 is handled by X86ISD::UMUL8.
3070 case X86ISD::SDIVREM8_SEXT_HREG:
3071 case X86ISD::UDIVREM8_ZEXT_HREG: {
3077 Opcode == X86ISD::SDIVREM8_SEXT_HREG);
3216 if (Opcode == X86ISD::UDIVREM8_ZEXT_HREG ||
3217 Opcode == X86ISD::SDIVREM8_SEXT_HREG) {
3249 case X86ISD::CMP: {
3317 case X86ISD::PCMPISTR: {
3345 case X86ISD::PCMPESTR: {
