Lines Matching refs:CTLZ
1598 // CTLZ: llvm\test\CodeGen\X86\vector-lzcnt-*.ll
1602 { ISD::CTLZ, MVT::v8i64, 1 },
1603 { ISD::CTLZ, MVT::v16i32, 1 },
1604 { ISD::CTLZ, MVT::v32i16, 8 },
1605 { ISD::CTLZ, MVT::v64i8, 20 },
1606 { ISD::CTLZ, MVT::v4i64, 1 },
1607 { ISD::CTLZ, MVT::v8i32, 1 },
1608 { ISD::CTLZ, MVT::v16i16, 4 },
1609 { ISD::CTLZ, MVT::v32i8, 10 },
1610 { ISD::CTLZ, MVT::v2i64, 1 },
1611 { ISD::CTLZ, MVT::v4i32, 1 },
1612 { ISD::CTLZ, MVT::v8i16, 4 },
1613 { ISD::CTLZ, MVT::v16i8, 4 },
1620 { ISD::CTLZ, MVT::v8i64, 23 },
1621 { ISD::CTLZ, MVT::v16i32, 22 },
1622 { ISD::CTLZ, MVT::v32i16, 18 },
1623 { ISD::CTLZ, MVT::v64i8, 17 },
1636 { ISD::CTLZ, MVT::v8i64, 29 },
1637 { ISD::CTLZ, MVT::v16i32, 35 },
1665 { ISD::CTLZ, MVT::v4i64, 23 },
1666 { ISD::CTLZ, MVT::v8i32, 18 },
1667 { ISD::CTLZ, MVT::v16i16, 14 },
1668 { ISD::CTLZ, MVT::v32i8, 9 },
1692 { ISD::CTLZ, MVT::v4i64, 48 }, // 2 x 128-bit Op + extract/insert
1693 { ISD::CTLZ, MVT::v8i32, 38 }, // 2 x 128-bit Op + extract/insert
1694 { ISD::CTLZ, MVT::v16i16, 30 }, // 2 x 128-bit Op + extract/insert
1695 { ISD::CTLZ, MVT::v32i8, 20 }, // 2 x 128-bit Op + extract/insert
1735 { ISD::CTLZ, MVT::v2i64, 23 },
1736 { ISD::CTLZ, MVT::v4i32, 18 },
1737 { ISD::CTLZ, MVT::v8i16, 14 },
1738 { ISD::CTLZ, MVT::v16i8, 9 },
1756 { ISD::CTLZ, MVT::v2i64, 25 },
1757 { ISD::CTLZ, MVT::v4i32, 26 },
1758 { ISD::CTLZ, MVT::v8i16, 20 },
1759 { ISD::CTLZ, MVT::v16i8, 17 },
1794 case Intrinsic::ctlz:
1795 ISD = ISD::CTLZ;
