Lines Matching refs:DemandedElts
691 APInt DemandedElts = DemandedMask.zextOrTrunc(ArgWidth);
692 if (DemandedElts.isNullValue())
925 APInt DemandedElts,
936 DemandedElts = (1 << DemandedElts.getActiveBits()) - 1;
945 DemandedElts &= (1 << countPopulation(DMaskVal)) - 1;
952 if (!!DemandedElts[OrigLoadIdx])
963 unsigned NewNumElts = PowerOf2Ceil(DemandedElts.countPopulation());
967 if (NewNumElts >= VWidth && DemandedElts.isMask()) {
1009 DemandedElts.countTrailingZeros());
1015 if (!!DemandedElts[OrigLoadIdx])
1028 /// DemandedElts contains the set of elements that are actually used by the
1035 Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts,
1040 assert((DemandedElts & ~EltMask) == 0 && "Invalid DemandedElts!");
1048 if (DemandedElts.isNullValue()) { // If nothing is demanded, provide undef.
1059 if (DemandedElts.isAllOnesValue())
1067 if (!DemandedElts[i]) { // If not demanded, set to undef.
1105 DemandedElts = EltMask;
1125 TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts,
1134 APInt PreInsertDemandedElts = DemandedElts;
1143 if (IdxNo >= VWidth || !DemandedElts[IdxNo]) {
1158 if (DemandedElts[i]) {
1190 } else if (!DemandedElts[i]) {
1263 APInt LeftDemanded(DemandedElts), RightDemanded(DemandedElts);
1304 InputDemandedElts = DemandedElts;
1311 if (DemandedElts[OutIdx])
1319 if (DemandedElts[InIdx / Ratio])
1363 TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts, UndefElts,
1366 TmpV = SimplifyDemandedVectorElts(I->getOperand(1), DemandedElts,
1376 TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts, UndefElts,
1389 // use Arg0 if DemandedElts[0] is clear like we do for other intrinsics.
1391 if (!DemandedElts[0]) {
1397 DemandedElts = 1;
1398 TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
1409 TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
1414 if (!DemandedElts[0]) {
1431 TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
1436 if (!DemandedElts[0]) {
1442 DemandedElts = 1;
1443 TmpV = SimplifyDemandedVectorElts(II->getArgOperand(1), DemandedElts,
1460 APInt DemandedElts2 = DemandedElts;
1467 if (!DemandedElts[0]) {
1473 DemandedElts = 1;
1474 TmpV = SimplifyDemandedVectorElts(II->getArgOperand(1), DemandedElts,
1500 TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
1505 if (!DemandedElts[0]) {
1511 DemandedElts = 1;
1512 TmpV = SimplifyDemandedVectorElts(II->getArgOperand(1), DemandedElts,
1515 TmpV = SimplifyDemandedVectorElts(II->getArgOperand(2), DemandedElts,
1556 if (DemandedElts[Idx])
1598 TmpV = SimplifyDemandedVectorElts(Op1, DemandedElts, UndefElts,
1614 return simplifyAMDGCNMemoryIntrinsicDemanded(II, DemandedElts);
1617 return simplifyAMDGCNMemoryIntrinsicDemanded(II, DemandedElts, 0);
