Lines Matching refs:PAD_CTL_HYS
20 PAD_CTL_HYS | PAD_CTL_SRE_FAST)
23 PAD_CTL_HYS)
26 PAD_CTL_HYS)
28 PAD_CTL_PUS_100K_UP | PAD_CTL_HYS)
29 #define MX51_ECSPI_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_HYS | \
35 #define MX51_PAD_CTRL_2 (PAD_CTL_PKE | PAD_CTL_HYS)
36 #define MX51_PAD_CTRL_4 (PAD_CTL_PKE | PAD_CTL_DVS | PAD_CTL_HYS)
69 MX51_PAD_EIM_EB2__FEC_MDIO = IOMUX_PAD(0x468, 0x0d4, 3, 0x954, 0, PAD_CTL_PUS_22K_UP | PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | PAD_CTL_HYS),
195 MX51_PAD_SD1_CLK__SD1_CLK = IOMUX_PAD(0x7a0, 0x398, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS),
204 MX51_PAD_SD2_CLK__SD2_CLK = IOMUX_PAD(0x7c0, 0x3b8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL | PAD_CTL_HYS),
