Cross Reference: /external/u-boot/arch/arm/mach-sunxi/dram_sun8i

Lines Matching refs:para
31 static void mctl_set_cr(struct dram_para *para)
36 	writel(MCTL_CR_CS1_CONTROL(para->cs1) | MCTL_CR_UNKNOWN |
37 		MCTL_CR_CHANNEL(1) | MCTL_CR_DRAM_TYPE(para->dram_type) |
38 		(para->seq ? MCTL_CR_SEQUENCE : 0) |
39 		((para->bus_width == 16) ? MCTL_CR_BUSW16 : MCTL_CR_BUSW8) |
40 		MCTL_CR_PAGE_SIZE(para->page_size) | MCTL_CR_ROW(para->rows) |
41 		MCTL_CR_BANK(para->bank) | MCTL_CR_RANK(para->rank),
45 static void auto_detect_dram_size(struct dram_para *para)
47 	u8 orig_rank = para->rank;
51 	para->page_size = 512;
52 	para->seq = 1;
53 	para->rows = 16;
54 	para->rank = 1;
55 	mctl_set_cr(para);
62 	para->rows = 11;
63 	para->page_size = 8192;
64 	mctl_set_cr(para);
70 	para->seq = 0;
71 	para->rank = orig_rank;
72 	para->rows = rows;
73 	para->page_size = 1 << columns;
74 	mctl_set_cr(para);
85 static void auto_set_timing_para(struct dram_para *para)
131 	mctl_set_cr(para);
133 	if (para->dram_type == DRAM_TYPE_DDR3) {
138 	} else if (para->dram_type == DRAM_TYPE_LPDDR3) {
211 static void mctl_data_train_cfg(struct dram_para *para)
216 	if (para->rank == 2)
222 static int mctl_train_dram(struct dram_para *para)
227 	mctl_data_train_cfg(para);
257 static int mctl_channel_init(struct dram_para *para)
267 	auto_set_timing_para(para);
314 	para->cs1 = 0;
315 	para->rank = 2;
316 	para->bus_width = 16;
317 	mctl_set_cr(para);
323 	if (para->dram_type == DRAM_TYPE_LPDDR3)
331 	mctl_data_train_cfg(para);
337 	if (para->dram_type == DRAM_TYPE_DDR3)
343 	if (mctl_train_dram(para) != 0) {
351 		para->rank = 1;
352 		mctl_set_cr(para);
359 			para->cs1 = 1;
360 			mctl_set_cr(para);
361 			if (mctl_train_dram(para) == 0)
367 		para->cs1 = 0;
368 		para->bus_width = 8;
369 		mctl_set_cr(para);
370 		if (mctl_train_dram(para) != 0)
388 static void mctl_sys_init(struct dram_para *para)
415 	para->rank = 2;
416 	para->bus_width = 16;
417 	mctl_set_cr(para);
432 	struct dram_para para = {
443 	para.dram_type = CONFIG_DRAM_TYPE;
453 	mctl_sys_init(&para);
455 	if (mctl_channel_init(&para) != 0)
458 	auto_detect_dram_size(&para);
464 	if (para.rank == 2)
469 	return para.page_size * (para.bus_width / 8) *
470 		(1 << (para.bank + para.rank + para.rows));
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