Cross Reference: /external/u-boot/arch/mips/mach-au1x00/au1x00_usb

Lines Matching defs:writel
51 #undef writel
54 #define writel(v,a)  au_writel((v),(int)(a))
477 			writel ((long)ed, &ohci->regs->ed_controlhead);
485 			writel (ohci->hc_control, &ohci->regs->control);
493 			writel ((long)ed, &ohci->regs->ed_bulkhead);
501 			writel (ohci->hc_control, &ohci->regs->control);
525 				writel (ohci->hc_control, &ohci->regs->control);
527 			writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
542 				writel (ohci->hc_control, &ohci->regs->control);
544 			writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
701 			writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
717 			writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
849 #define WR_RH_STAT(x)		{info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
850 #define WR_RH_PORTSTAT(x)	{info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
852 #define WR_RH_STAT(x)		writel((x), &gohci.regs->roothub.status)
853 #define WR_RH_PORTSTAT(x)	writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1251 		writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
1263 	writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1270 	writel (0, &ohci->regs->control);
1273 	writel (OHCI_HCR,  &ohci->regs->cmdstatus);
1300 	writel (0, &ohci->regs->ed_controlhead);
1301 	writel (0, &ohci->regs->ed_bulkhead);
1303 	writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1306 	writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1308 	writel (fminterval, &ohci->regs->fminterval);
1309 	writel (0x628, &ohci->regs->lsthresh);
1314 	writel (ohci->hc_control, &ohci->regs->control);
1320 	writel (mask, &ohci->regs->intrdisable);
1323 	writel (mask, &ohci->regs->intrstatus);
1326 	writel (mask, &ohci->regs->intrenable);
1330 	writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1332 	writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1389 		writel (OHCI_INTR_WDH, &regs->intrdisable);
1391 		writel (OHCI_INTR_WDH, &regs->intrenable);
1396 		writel (OHCI_INTR_SO, &regs->intrenable);
1404 		writel (OHCI_INTR_SF, &regs->intrdisable);
1406 			writel (OHCI_INTR_SF, &regs->intrenable);
1410 	writel (ints, &regs->intrstatus);
1572 	writel (gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
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