Lines Matching refs:Cache
23 #define ICAC_MEM_KBF_ISET (0x07) ! I Cache sets per way
24 #define ICAC_MEM_KBF_IWAY (0x07<<3) ! I cache ways
25 #define ICAC_MEM_KBF_ISZ (0x07<<6) ! I cache line size
26 #define DCAC_MEM_KBF_DSET (0x07) ! D Cache sets per way
27 #define DCAC_MEM_KBF_DWAY (0x07<<3) ! D cache ways
28 #define DCAC_MEM_KBF_DSZ (0x07<<6) ! D cache line size
44 #define CR_ICAC_MEM $cr1 ! I-cache/memory config reg
45 #define CR_DCAC_MEM $cr2 ! D-cache/memory config reg
326 * 1.2 Flush cache and TLB
327 * 1.3 Disable MMU and cache
380 ! $t1= bit width of I cache line size(ISZ)
384 sll $t5, $t4, $t1 ! get $t5 cache line size
391 sll $p1, $p1, $t3 ! GET the total cache size
415 ! $t1= bit width of D cache line size(DSZ)
419 sll $t5, $t4, $t1 ! get $t5 cache line size
426 sll $p1, $p1, $t3 ! GET the total cache size
