Lines Matching refs:dev_num
42 int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id)
51 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE);
53 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
56 CHECK_STATUS(ddr3_tip_if_read(dev_num, access_type, if_id,
75 (dev_num, if_id,
99 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
103 CHECK_STATUS(ddr3_tip_if_write(dev_num, access_type, if_id,
111 int get_valid_win_rx(u32 dev_num, u32 if_id, u8 res[4])
124 CHECK_STATUS(ddr3_tip_bus_read(dev_num, if_id,
145 int ddr3_tip_vref(u32 dev_num)
166 u32 octets_per_if_num = ddr3_tip_dev_attr_get(dev_num, MV_ATTR_OCTET_PER_INTERFACE);
169 CHECK_STATUS(ddr3_tip_special_rx(dev_num));
199 (dev_num, if_id,
203 (dev_num, ACCESS_TYPE_UNICAST,
225 ddr3_tip_centralization_rx(dev_num);
232 get_valid_win_rx(dev_num, if_id, res);
373 (dev_num, if_id,
379 (dev_num,
488 (dev_num, if_id,
494 (dev_num,
531 (dev_num, if_id,
537 (dev_num,
561 (dev_num, if_id,
567 (dev_num,
605 (dev_num, if_id,
627 int ddr3_tip_cmd_addr_init_delay(u32 dev_num, u32 adll_tap)
668 CHECK_STATUS(ddr3_tip_bus_write(dev_num, ACCESS_TYPE_UNICAST,
