Lines Matching defs:pup
44 /* PBS locked dq (per pup) */
66 static void ddr3_pbs_write_pup_dqs_reg(u32 cs, u32 pup, u32 dqs_delay);
96 u32 pup, dq, pups, cur_max_pup, valid_pup, reg;
124 for (pup = 0; pup < pups; pup++) {
126 skew_sum_array[pup][dq] = 0;
138 * This parameter stores the current PUP
145 /* Only 1 pup in this case */
172 for (pup = 0; pup < cur_max_pup; pup++) {
175 pup + ecc *
203 pbs_dq_mapping[pup *
244 for (pup = 0; pup < cur_max_pup; pup++) {
249 DEBUG_PBS_S("DDR3 - PBS - PUP");
250 DEBUG_PBS_D((pup + (ecc * ECC_PUP)), 1);
258 * Deskew For all bits (per PUP)
265 [((pup) * DQ_NUM) +
276 for (pup = 0; pup < cur_max_pup; pup++) {
278 skew_sum_array[pup + (ecc * (max_pup - 1))]
280 [((pup) * DQ_NUM) + dq];
293 for (pup = 0; pup < max_pup; pup++) {
298 DEBUG_PBS_S("DDR3 - PBS - PUP");
299 DEBUG_PBS_D(pup, 1);
304 /* Bit# Deskew <- Bit# Deskew - last / first failing bit Deskew For all bits (per PUP) (minimize delay elements) */
308 DEBUG_PBS_D(skew_sum_array[pup][dq] /
317 * pup and each bit
322 for (pup = 0; pup < max_pup; pup++) {
329 pattern_skew_array[pup][dq] +=
330 (skew_sum_array[pup][dq] /
337 for (pup = 0; pup < max_pup; pup++) {
339 skew_array[((pup) * DQ_NUM) + dq] =
340 pattern_skew_array[pup][dq] / COUNT_PBS_PATTERN;
344 for (pup = 0; pup < max_pup; pup++) {
349 DEBUG_PBS_S("DDR3 - PBS - PUP");
350 DEBUG_PBS_D(pup, 1);
357 * failing bit Deskew For all bits (per PUP)
363 DEBUG_PBS_D(skew_array[(pup * DQ_NUM) + dq], 2);
370 for (pup = 0; pup < max_pup; pup++) {
371 if (pup == (max_pup - 1) && dram_info->ecc_ena)
372 pup = ECC_PUP;
373 ddr3_pbs_write_pup_dqs_reg(CS0, pup, INIT_WL_DELAY);
411 u32 cur_max_pup, pup;
434 /* Set current pup number */
440 unlock_pup = cur_pup; /* '1' for each unlocked pup */
451 for (pup = 0; pup < cur_max_pup; pup++)
453 pup * (1 - ecc) +
476 /* If any PUP failed there is '1' to mark the PUP */
482 for (pup = 0; pup < cur_max_pup; pup++) {
483 if (((new_lockup_pup >> pup) & 0x1) &&
484 dqs_dly_set[pup] == 0)
485 dqs_dly_set[pup] = adll_val - 1;
493 for (pup = 0; pup < cur_max_pup; pup++) {
494 if (((unlock_pup >> pup) & 0x1) &&
495 dqs_dly_set[pup] == 0)
496 dqs_dly_set[pup] = adll_val - 1;
503 /* Set the PUP DQS DLY Values */
504 for (pup = 0; pup < cur_max_pup; pup++)
505 ddr3_pbs_write_pup_dqs_reg(CS0, pup * (1 - ecc) + ECC_PUP * ecc,
506 dqs_dly_set[pup]);
538 u32 pup, dq, pups, cur_max_pup, valid_pup, reg;
567 for (pup = 0; pup < pups; pup++) {
569 skew_sum_array[pup][dq] = 0;
580 * This parameter stores the current PUP
587 /* Only 1 pup in this case */
614 for (pup = 0; pup < cur_max_pup; pup++) {
617 pup + ecc * (max_pup - 1)][dq] =
639 for (pup = 0; pup < cur_max_pup; pup++) {
644 pup * (1 - ecc)
647 pup + ecc * ECC_PUP,
652 for (pup = 0; pup < cur_max_pup; pup++) {
655 pup +
698 for (pup = 0; pup < max_pup;
699 pup++) {
702 pup +
708 for (pup = 0; pup < cur_max_pup;
709 pup++) {
715 [pup * (1 - ecc) +
718 pup + ecc * ECC_PUP,
747 for (pup = 0; pup < cur_max_pup; pup++)
749 pup + ecc * ECC_PUP,
754 for (pup = 0; pup < cur_max_pup; pup++) {
759 DEBUG_PBS_FULL_S("DDR3 - PBS - PUP");
760 DEBUG_PBS_FULL_D((pup +
769 * Deskew For all bits (per PUP)
776 [((pup) *
788 for (pup = 0; pup < cur_max_pup; pup++) {
791 [pup + (ecc * (max_pup - 1))]
793 skew_array[((pup) * DQ_NUM) + dq];
806 * pup and each bit
810 for (pup = 0; pup < max_pup; pup++) {
817 pattern_skew_array[pup][dq] +=
818 (skew_sum_array[pup][dq] /
825 for (pup = 0; pup < max_pup; pup++) {
830 DEBUG_PBS_S("DDR3 - PBS RX - PUP");
831 DEBUG_PBS_D(pup, 1);
838 * failing bit Deskew For all bits (per PUP)
844 DEBUG_PBS_D(skew_sum_array[pup][dq] /
853 for (pup = 0; pup < max_pup; pup++) {
855 skew_array[((pup) * DQ_NUM) + dq] =
856 pattern_skew_array[pup][dq] / COUNT_PBS_PATTERN;
860 for (pup = 0; pup < max_pup; pup++) {
865 DEBUG_PBS_S("DDR3 - PBS - PUP");
866 DEBUG_PBS_D(pup, 1);
873 * failing bit Deskew For all bits (per PUP)
879 DEBUG_PBS_D(skew_array[(pup * DQ_NUM) + dq], 2);
923 u32 cur_max_pup, pup, pass_pup;
945 /* Set current pup number */
951 unlock_pup = cur_pup; /* '1' for each unlocked pup */
957 for (pup = 0; pup < cur_max_pup; pup++)
958 ddr3_write_pup_reg(PUP_DQS_RD, CS0, pup + ecc * ECC_PUP, 0,
983 ddr3_write_pup_reg(PUP_DQS_RD, CS0, pup + ecc * ECC_PUP,
1008 for (pup = 0; pup < cur_max_pup; pup++) {
1009 if (IS_PUP_ACTIVE(unlock_pup, pup) == 1) {
1011 pup + ecc * ECC_PUP, 0,
1034 * Get mask for pup which passed so their adll will be
1044 for (pup = 0; pup < cur_max_pup; pup++) {
1045 if (IS_PUP_ACTIVE(pass_pup, pup) == 1) {
1047 pup + ecc * ECC_PUP, 0,
1070 for (pup = 0; pup < cur_max_pup; pup++) {
1071 if (IS_PUP_ACTIVE(unlock_pup, pup) == 1) {
1073 pup + ecc * ECC_PUP, 0,
1086 static void lock_pups(u32 pup, u32 *pup_locked, u8 *unlock_pup_dq_array,
1093 DEBUG_PBS_FULL_S("DDR3 - PBS Per bit - Lock PBS value for all remaining PUPs bits, pup ");
1094 DEBUG_PBS_FULL_D(pup, 1);
1097 idx = pup * (1 - ecc) + ecc * ECC_PUP;
1098 *pup_locked &= ~(1 << pup);
1101 if (IS_PUP_ACTIVE(unlock_pup_dq_array[dq], pup) == 1) {
1105 unlock_pup_dq_array[dq] &= ~(1 << pup);
1106 skew_array[(pup * DQ_NUM) + dq] = pbs_curr_val;
1140 * Bit array to indicate if we already get fail on bit per pup & dq bit
1148 u32 pup, dq;
1152 /* bit array that indicates all dq of the pup locked */
1154 u32 first_fail[MAX_PUP_NUM] = { 0 }; /* count first fail per pup */
1155 /* indicates whether we get first fail per pup */
1157 pup already get fail */
1187 /* Set current pup number */
1210 for (pup = 0; pup < max_pup; pup++) {
1213 idx = pup * (1 - ecc) + ecc * ECC_PUP;
1215 if (IS_PUP_ACTIVE(unlock_pup_dq_array[dq], pup)
1248 for (pup = 0; pup < max_pup; pup++) {
1251 pup) == 1)
1254 pup) == 0)) {
1257 DEBUG_PBS_FULL_S(" PUP: ");
1258 DEBUG_PBS_FULL_D(pup, 1);
1277 /* Summarize the locked pup */
1308 for (pup = 0; pup < max_pup; pup++) {
1309 /* Check if current pup already received error */
1310 if (IS_PUP_ACTIVE(pup_locked, pup) == 1) {
1311 /* Valid pup for current function */
1312 if (IS_PUP_ACTIVE(sum_pup_fail, pup) ==
1314 DEBUG_PBS_FULL_C("DDR3 - PBS Per bit - skipping lock of pup (first loop of pbs)",
1315 pup, 1);
1318 if (IS_PUP_ACTIVE(sum_pup_fail, pup)
1320 DEBUG_PBS_FULL_C("DDR3 - PBS Per bit - Locking pup %d (even though it wasn't supposed to be locked)",
1321 pup, 1);
1324 /* Already got fail on the PUP */
1326 DEBUG_PBS_FULL_S("DDR3 - PBS Per bit - Locking remaning DQs for pup - ");
1327 DEBUG_PBS_FULL_D(pup, 1);
1333 pup) == 1) {
1337 skew_array[((pup) *
1346 * Reset this pup bit - when
1348 * pup
1350 *pcur_pup &= ~(1 << pup);
1354 DEBUG_PBS_FULL_S("DDR3 - PBS Per bit - Pup ");
1355 DEBUG_PBS_FULL_D(pup, 1);
1370 for (pup = 0; pup < max_pup; pup++) {
1371 if (IS_PUP_ACTIVE(pup_locked, pup) == 1) {
1372 /* pup is not locked */
1373 if (first_failed[pup] == 0) {
1375 if (IS_PUP_ACTIVE(sum_pup_fail, pup) ==
1378 DEBUG_PBS_FULL_C("DDR3 - PBS Per bit - First fail in pup ",
1379 pup, 1);
1380 first_failed[pup] = 1;
1381 first_fail[pup] = pbs_curr_val;
1388 first_fail[pup];
1391 calc_pbs_diff = first_fail[pup] -
1396 lock_pups(pup, &pup_locked,
1418 u32 pup, phys_pup, dq;
1420 u32 pbs_min; /* minimal pbs val per pup */
1421 u32 pbs_max; /* maximum pbs val per pup */
1428 for (pup = 0; pup < max_pup; pup++) {
1429 if (pup == (max_pup - 1) && dram_info->ecc_ena)
1432 phys_pup = pup;
1441 if (pbs_min > skew_array[(pup * DQ_NUM) + dq])
1442 pbs_min = skew_array[(pup * DQ_NUM) + dq];
1444 if (pbs_max < skew_array[(pup * DQ_NUM) + dq])
1445 pbs_max = skew_array[(pup * DQ_NUM) + dq];
1450 DEBUG_PBS_FULL_S("DDR3 - PBS - PUP");
1456 val[pup] = 0;
1465 * failing bit Deskew For all bits (per PUP)
1472 DEBUG_PBS_FULL_D((skew_array[(pup * DQ_NUM) + dq] -
1476 idx = (pup * DQ_NUM) + dq;
1488 val[pup] += skew_array[idx] - pbs_min;
1498 val[pup] / 8);
1507 static void ddr3_pbs_write_pup_dqs_reg(u32 cs, u32 pup, u32 dqs_delay)
1511 reg = (ddr3_read_pup_reg(PUP_WL_MODE, cs, pup) & 0x3FF);
1515 reg |= (pup << REG_PHY_PUP_OFFS);
