Lines Matching refs:ifc
42 /* overview of the fsl ifc controller */
49 void __iomem *addr; /* Address of assigned IFC buffer */
218 * Set up the IFC hardware block and page address fields, and the ifc nand
219 * structure addr field to point to the correct IFC buffer in memory
226 struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
232 ifc_out32(&ifc->ifc_nand.row0, page_addr);
233 ifc_out32(&ifc->ifc_nand.col0, (oob ? IFC_NAND_COL_MS : 0) | column);
278 * execute IFC NAND command and wait for it to complete
285 struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
292 ifc_out32(&ifc->ifc_nand.nand_csel, priv->bank << IFC_NAND_CSEL_SHIFT);
295 ifc_out32(&ifc->ifc_nand.nandseq_strt,
302 ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat);
308 ifc_out32(&ifc->ifc_nand.nand_evter_stat, ctrl->status);
322 eccstat_regs = ifc->ifc_nand.nand_eccstat;
337 * IFC-A002770 -- so report it now if we
362 struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
366 ifc_out32(&ifc->ifc_nand.nand_fir0,
372 ifc_out32(&ifc->ifc_nand.nand_fir1, 0x0);
374 ifc_out32(&ifc->ifc_nand.nand_fcr0,
378 ifc_out32(&ifc->ifc_nand.nand_fir0,
385 ifc_out32(&ifc->ifc_nand.nand_fcr0,
388 ifc_out32(&ifc->ifc_nand.nand_fcr0,
393 /* cmdfunc send commands to the IFC NAND Machine */
400 struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
410 ifc_out32(&ifc->ifc_nand.nand_fbcr, 0);
426 ifc_out32(&ifc->ifc_nand.nand_fbcr, mtd->oobsize - column);
443 ifc_out32(&ifc->ifc_nand.nand_fir0,
447 ifc_out32(&ifc->ifc_nand.nand_fcr0,
449 ifc_out32(&ifc->ifc_nand.row3, column);
455 ifc_out32(&ifc->ifc_nand.nand_fbcr, 256);
470 ifc_out32(&ifc->ifc_nand.nand_fir0,
475 ifc_out32(&ifc->ifc_nand.nand_fcr0,
479 ifc_out32(&ifc->ifc_nand.nand_fbcr, 0);
496 ifc_out32(&ifc->ifc_nand.nand_fir0,
503 ifc_out32(&ifc->ifc_nand.nand_fir1,
516 ifc_out32(&ifc->ifc_nand.nand_fir0,
522 ifc_out32(&ifc->ifc_nand.nand_fir1,
542 ifc_out32(&ifc->ifc_nand.nand_fcr0, nand_fcr0);
550 ifc_out32(&ifc->ifc_nand.nand_fbcr,
553 ifc_out32(&ifc->ifc_nand.nand_fbcr, 0);
559 ifc_out32(&ifc->ifc_nand.nand_fir0,
562 ifc_out32(&ifc->ifc_nand.nand_fcr0,
564 ifc_out32(&ifc->ifc_nand.nand_fbcr, 1);
582 ifc_out32(&ifc->ifc_nand.nand_fir0,
584 ifc_out32(&ifc->ifc_nand.nand_fcr0,
596 * Write buf to the IFC NAND Controller Data Buffer
623 * read a byte from either the IFC hardware buffer if it has any data left
634 * If there are still bytes in the IFC buffer, then use the
647 * Read two bytes from the IFC hardware buffer
658 * If there are still bytes in the IFC buffer, then use the
672 * Read from the IFC Controller Data Buffer
701 struct fsl_ifc_runtime *ifc = ctrl->regs.rregs;
709 ifc_out32(&ifc->ifc_nand.nand_fir0,
712 ifc_out32(&ifc->ifc_nand.nand_fcr0, NAND_CMD_STATUS <<
714 ifc_out32(&ifc->ifc_nand.nand_fbcr, 1);
723 nand_fsr = ifc_in32(&ifc->ifc_nand.nand_fsr);
794 struct fsl_ifc_runtime *ifc = ifc_ctrl->regs.rregs;
801 ncfgr = ifc_in32(&ifc->ifc_nand.ncfgr);
802 ifc_out32(&ifc->ifc_nand.ncfgr, ncfgr | IFC_NAND_SRAM_INIT_EN);
808 ifc_in32(&ifc->ifc_nand.nand_evter_stat);
813 printf("fsl-ifc: Failed to Initialise SRAM\n");
829 ifc_out32(&ifc->ifc_nand.nand_fir0,
833 ifc_out32(&ifc->ifc_nand.nand_fcr0,
835 ifc_out32(&ifc->ifc_nand.row3, 0x0);
837 ifc_out32(&ifc->ifc_nand.nand_fbcr, 0x0);
840 ifc_out32(&ifc->ifc_nand.row0, 0x0);
841 ifc_out32(&ifc->ifc_nand.col0, 0x0);
844 ifc_out32(&ifc->ifc_nand.nand_csel, priv->bank << IFC_NAND_CSEL_SHIFT);
847 ifc_out32(&ifc->ifc_nand.nandseq_strt, IFC_NAND_SEQ_STRT_FIR_STRT);
852 ifc_ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat);
859 printf("fsl-ifc: Failed to Initialise SRAM\n");
863 ifc_out32(&ifc->ifc_nand.nand_evter_stat, ifc_ctrl->status);
1007 printf("ifc nand: bad csor %#x: bad page size\n", csor);
