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Lines Matching refs:regs

78 	struct zynq_qspi_regs *regs;
85 	struct zynq_qspi_regs *regs;
105 	plat->regs = (struct zynq_qspi_regs *)fdtdec_get_addr(blob,
113 	debug("%s: regs=%p max-frequency=%d\n", __func__,
114 	      plat->regs, plat->frequency);
121 	struct zynq_qspi_regs *regs = priv->regs;
125 	writel(~ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr);
128 	writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->idr);
131 	writel(ZYNQ_QSPI_TXFIFO_THRESHOLD, &regs->txftr);
132 	writel(ZYNQ_QSPI_RXFIFO_THRESHOLD, &regs->rxftr);
135 	while (readl(&regs->isr) & ZYNQ_QSPI_IXR_RXNEMPTY_MASK)
136 		readl(&regs->drxr);
139 	writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->isr);
142 	confr = readl(&regs->cr);
147 	writel(confr, &regs->cr);
150 	confr = readl(&regs->lqspicfg);
152 	writel(confr, &regs->lqspicfg);
155 	writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr);
163 	priv->regs = plat->regs;
269 	struct zynq_qspi_regs *regs = priv->regs;
271 	confr = readl(&regs->cr);
282 	writel(confr, &regs->cr);
294 	struct zynq_qspi_regs *regs = priv->regs;
308 			writel(data, &regs->txd0r);
313 			if (!(readl(&regs->isr)
320 			writel(data, &regs->cr + (offset / 4));
341 	struct zynq_qspi_regs *regs = priv->regs;
349 		status = readl(&regs->isr);
358 	writel(status, &regs->isr);
361 	writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->idr);
375 			data = readl(&regs->drxr);
395 			writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->ier);
404 				       &regs->idr);
427 	struct zynq_qspi_regs *regs = priv->regs;
440 	writel(ZYNQ_QSPI_IXR_ALL_MASK, &regs->ier);
496 	struct zynq_qspi_regs *regs = priv->regs;
498 	writel(ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr);
507 	struct zynq_qspi_regs *regs = priv->regs;
509 	writel(~ZYNQ_QSPI_ENR_SPI_EN_MASK, &regs->enr);
553 	struct zynq_qspi_regs *regs = priv->regs;
561 	confr = readl(&regs->cr);
576 	writel(confr, &regs->cr);
579 	debug("%s: regs=%p, speed=%d\n", __func__, priv->regs, priv->freq);
587 	struct zynq_qspi_regs *regs = priv->regs;
591 	confr = readl(&regs->cr);
599 	writel(confr, &regs->cr);
602 	debug("%s: regs=%p, mode=%d\n", __func__, priv->regs, priv->mode);