Lines Matching refs:likely
422 if (likely(req->req.status == -EINPROGRESS))
460 while (likely(count--))
487 if (likely(req->req.length != req->req.actual)
625 if (likely(udccs & UDCCS_BO_RNE)) {
635 while (likely(count-- != 0)) {
824 if (likely(req && ep->desc))
829 if (likely(req != NULL))
1251 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))
1370 if (likely(dev->ep0state == EP0_IN_DATA_PHASE
1380 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA))
1405 * - OPR got set, without SA (likely status stage)
1470 if (likely(!list_empty(&ep->queue)))
1481 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1484 if (likely(tmp))
1486 if (req && likely((udccs & UDCCS_BI_TFS) != 0))
1490 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK))
1495 if (likely(tmp))
1499 if (likely(req))
