Lines Matching refs:regs
62 struct atmel_hlcd_regs *regs;
68 regs = (struct atmel_hlcd_regs *)panel_info.mmio;
71 writel(LCDC_LCDDIS_DISPDIS, ®s->lcdc_lcddis);
72 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
77 writel(LCDC_LCDDIS_SYNCDIS, ®s->lcdc_lcddis);
78 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
83 writel(LCDC_LCDDIS_CLKDIS, ®s->lcdc_lcddis);
84 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
89 writel(LCDC_LCDDIS_PWMDIS, ®s->lcdc_lcddis);
90 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
109 ®s->lcdc_lcdcfg0);
118 ®s->lcdc_lcdcfg0);
151 writel(value, ®s->lcdc_lcdcfg5);
156 writel(value, ®s->lcdc_lcdcfg1);
160 writel(value, ®s->lcdc_lcdcfg2);
164 writel(value, ®s->lcdc_lcdcfg3);
169 writel(value, ®s->lcdc_lcdcfg4);
172 ®s->lcdc_basecfg0);
177 ®s->lcdc_basecfg1);
181 ®s->lcdc_basecfg1);
188 writel(LCDC_BASECFG2_XSTRIDE(0), ®s->lcdc_basecfg2);
189 writel(0, ®s->lcdc_basecfg3);
190 writel(LCDC_BASECFG4_DMA, ®s->lcdc_basecfg4);
193 writel(~0UL, ®s->lcdc_lcdidr);
194 writel(~0UL, ®s->lcdc_baseidr);
208 writel(desc->address, ®s->lcdc_baseaddr);
209 writel(desc->control, ®s->lcdc_basectrl);
210 writel(desc->next, ®s->lcdc_basenext);
212 ®s->lcdc_basecher);
215 value = readl(®s->lcdc_lcden);
216 writel(value | LCDC_LCDEN_CLKEN, ®s->lcdc_lcden);
217 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
221 value = readl(®s->lcdc_lcden);
222 writel(value | LCDC_LCDEN_SYNCEN, ®s->lcdc_lcden);
223 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
227 value = readl(®s->lcdc_lcden);
228 writel(value | LCDC_LCDEN_DISPEN, ®s->lcdc_lcden);
229 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
233 value = readl(®s->lcdc_lcden);
234 writel(value | LCDC_LCDEN_PWMEN, ®s->lcdc_lcden);
235 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
253 struct atmel_hlcd_regs *regs;
293 struct atmel_hlcd_regs *regs = priv->regs;
300 writel(LCDC_LCDDIS_DISPDIS, ®s->lcdc_lcddis);
301 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
306 writel(LCDC_LCDDIS_SYNCDIS, ®s->lcdc_lcddis);
307 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
312 writel(LCDC_LCDDIS_CLKDIS, ®s->lcdc_lcddis);
313 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
318 writel(LCDC_LCDDIS_PWMDIS, ®s->lcdc_lcddis);
319 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
342 ®s->lcdc_lcdcfg0);
351 ®s->lcdc_lcdcfg0);
382 writel(value, ®s->lcdc_lcdcfg5);
387 writel(value, ®s->lcdc_lcdcfg1);
391 writel(value, ®s->lcdc_lcdcfg2);
395 writel(value, ®s->lcdc_lcdcfg3);
400 writel(value, ®s->lcdc_lcdcfg4);
403 ®s->lcdc_basecfg0);
408 ®s->lcdc_basecfg1);
412 ®s->lcdc_basecfg1);
419 writel(LCDC_BASECFG2_XSTRIDE(0), ®s->lcdc_basecfg2);
420 writel(0, ®s->lcdc_basecfg3);
421 writel(LCDC_BASECFG4_DMA, ®s->lcdc_basecfg4);
424 writel(~0UL, ®s->lcdc_lcdidr);
425 writel(~0UL, ®s->lcdc_baseidr);
444 writel(desc->address, ®s->lcdc_baseaddr);
445 writel(desc->control, ®s->lcdc_basectrl);
446 writel(desc->next, ®s->lcdc_basenext);
448 ®s->lcdc_basecher);
451 value = readl(®s->lcdc_lcden);
452 writel(value | LCDC_LCDEN_CLKEN, ®s->lcdc_lcden);
453 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_CLKSTS,
457 value = readl(®s->lcdc_lcden);
458 writel(value | LCDC_LCDEN_SYNCEN, ®s->lcdc_lcden);
459 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_LCDSTS,
463 value = readl(®s->lcdc_lcden);
464 writel(value | LCDC_LCDEN_DISPEN, ®s->lcdc_lcden);
465 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_DISPSTS,
469 value = readl(®s->lcdc_lcden);
470 writel(value | LCDC_LCDEN_PWMEN, ®s->lcdc_lcden);
471 ret = wait_for_bit_le32(®s->lcdc_lcdsr, LCDC_LCDSR_PWMSTS,
505 priv->regs = (struct atmel_hlcd_regs *)devfdt_get_addr(dev);
506 if (!priv->regs) {
