Lines Matching refs:fn
240 #define DEFINE_FUNCTION(FN, REGTYPE, REG, OP) \
241 void TurboAssembler::FN(const REGTYPE REG, const MemOperand& addr) { \
248 #define DEFINE_FUNCTION(FN, REGTYPE, REG, REG2, OP) \
249 void TurboAssembler::FN(const REGTYPE REG, const REGTYPE REG2, \
257 #define DECLARE_FUNCTION(FN, OP) \
258 void TurboAssembler::FN(const Register& rt, const Register& rn) { \
265 #define DECLARE_FUNCTION(FN, OP) \
266 void MacroAssembler::FN(const Register& rs, const Register& rt, \
482 void TurboAssembler::Fabs(const VRegister& fd, const VRegister& fn) {
484 fabs(fd, fn);
487 void TurboAssembler::Fadd(const VRegister& fd, const VRegister& fn,
490 fadd(fd, fn, fm);
493 void TurboAssembler::Fccmp(const VRegister& fn, const VRegister& fm,
497 fccmp(fn, fm, nzcv, cond);
500 void TurboAssembler::Fcmp(const VRegister& fn, const VRegister& fm) {
502 fcmp(fn, fm);
505 void TurboAssembler::Fcmp(const VRegister& fn, double value) {
509 VRegister tmp = temps.AcquireSameSizeAs(fn);
511 fcmp(fn, tmp);
513 fcmp(fn, value);
517 void MacroAssembler::Fcsel(const VRegister& fd, const VRegister& fn,
521 fcsel(fd, fn, fm, cond);
524 void TurboAssembler::Fcvt(const VRegister& fd, const VRegister& fn) {
526 fcvt(fd, fn);
529 void TurboAssembler::Fcvtas(const Register& rd, const VRegister& fn) {
532 fcvtas(rd, fn);
535 void TurboAssembler::Fcvtau(const Register& rd, const VRegister& fn) {
538 fcvtau(rd, fn);
541 void TurboAssembler::Fcvtms(const Register& rd, const VRegister& fn) {
544 fcvtms(rd, fn);
547 fn) {
550 fcvtmu(rd, fn);
553 void TurboAssembler::Fcvtns(const Register& rd, const VRegister& fn) {
556 fcvtns(rd, fn);
559 void TurboAssembler::Fcvtnu(const Register& rd, const VRegister& fn) {
562 fcvtnu(rd, fn);
565 void TurboAssembler::Fcvtzs(const Register& rd, const VRegister& fn) {
568 fcvtzs(rd, fn);
570 void TurboAssembler::Fcvtzu(const Register& rd, const VRegister& fn) {
573 fcvtzu(rd, fn);
576 void TurboAssembler::Fdiv(const VRegister& fd, const VRegister& fn,
579 fdiv(fd, fn, fm);
582 void MacroAssembler::Fmadd(const VRegister& fd, const VRegister& fn,
585 fmadd(fd, fn, fm, fa);
588 void TurboAssembler::Fmax(const VRegister& fd, const VRegister& fn,
591 fmax(fd, fn, fm);
594 void MacroAssembler::Fmaxnm(const VRegister& fd, const VRegister& fn,
597 fmaxnm(fd, fn, fm);
600 void TurboAssembler::Fmin(const VRegister& fd, const VRegister& fn,
603 fmin(fd, fn, fm);
606 void MacroAssembler::Fminnm(const VRegister& fd, const VRegister& fn,
609 fminnm(fd, fn, fm);
612 void TurboAssembler::Fmov(VRegister fd, VRegister fn) {
614 // Only emit an instruction if fd and fn are different, and they are both D
618 if (!fd.Is(fn) || !fd.Is64Bits()) {
619 fmov(fd, fn);
683 void TurboAssembler::Fmov(Register rd, VRegister fn) {
686 fmov(rd, fn);
689 void MacroAssembler::Fmsub(const VRegister& fd, const VRegister& fn,
692 fmsub(fd, fn, fm, fa);
695 void TurboAssembler::Fmul(const VRegister& fd, const VRegister& fn,
698 fmul(fd, fn, fm);
701 void MacroAssembler::Fnmadd(const VRegister& fd, const VRegister& fn,
704 fnmadd(fd, fn, fm, fa);
707 void MacroAssembler::Fnmsub(const VRegister& fd, const VRegister& fn,
710 fnmsub(fd, fn, fm, fa);
713 void TurboAssembler::Fsub(const VRegister& fd, const VRegister& fn,
716 fsub(fd, fn, fm);
