Lines Matching refs:src2
1409 void st2(VectorFormat vform, LogicVRegister src, LogicVRegister src2,
1411 void st2(VectorFormat vform, LogicVRegister src, LogicVRegister src2,
1413 void st3(VectorFormat vform, LogicVRegister src, LogicVRegister src2,
1415 void st3(VectorFormat vform, LogicVRegister src, LogicVRegister src2,
1417 void st4(VectorFormat vform, LogicVRegister src, LogicVRegister src2,
1419 void st4(VectorFormat vform, LogicVRegister src, LogicVRegister src2,
1422 const LogicVRegister& src1, const LogicVRegister& src2,
1427 const LogicVRegister& src1, const LogicVRegister& src2);
1429 const LogicVRegister& src1, const LogicVRegister& src2);
1431 const LogicVRegister& src1, const LogicVRegister& src2);
1433 const LogicVRegister& src1, const LogicVRegister& src2);
1435 const LogicVRegister& src1, const LogicVRegister& src2);
1437 const LogicVRegister& src1, const LogicVRegister& src2);
1439 const LogicVRegister& src1, const LogicVRegister& src2,
1442 const LogicVRegister& src1, const LogicVRegister& src2,
1445 const LogicVRegister& src1, const LogicVRegister& src2,
1448 const LogicVRegister& src1, const LogicVRegister& src2);
1453 const LogicVRegister& src2,
1456 const LogicVRegister& src1, const LogicVRegister& src2,
1459 const LogicVRegister& src1, const LogicVRegister& src2,
1462 const LogicVRegister& src1, const LogicVRegister& src2,
1465 const LogicVRegister& src1, const LogicVRegister& src2,
1468 const LogicVRegister& src1, const LogicVRegister& src2,
1471 const LogicVRegister& src1, const LogicVRegister& src2,
1474 const LogicVRegister& src1, const LogicVRegister& src2,
1477 const LogicVRegister& src1, const LogicVRegister& src2,
1480 const LogicVRegister& src1, const LogicVRegister& src2,
1483 const LogicVRegister& src1, const LogicVRegister& src2,
1486 const LogicVRegister& src1, const LogicVRegister& src2,
1489 const LogicVRegister& src1, const LogicVRegister& src2,
1492 const LogicVRegister& src1, const LogicVRegister& src2,
1495 const LogicVRegister& src1, const LogicVRegister& src2,
1498 const LogicVRegister& src1, const LogicVRegister& src2,
1501 const LogicVRegister& src1, const LogicVRegister& src2,
1504 const LogicVRegister& src1, const LogicVRegister& src2,
1508 const LogicVRegister& src2, int index);
1510 const LogicVRegister& src1, const LogicVRegister& src2,
1514 const LogicVRegister& src2, int index);
1516 const LogicVRegister& src1, const LogicVRegister& src2,
1520 const LogicVRegister& src2, int index);
1522 const LogicVRegister& src1, const LogicVRegister& src2,
1526 const LogicVRegister& src2, int index);
1528 const LogicVRegister& src1, const LogicVRegister& src2);
1530 const LogicVRegister& src1, const LogicVRegister& src2);
1532 const LogicVRegister& src1, const LogicVRegister& src2);
1534 const LogicVRegister& src1, const LogicVRegister& src2);
1536 const LogicVRegister& src1, const LogicVRegister& src2);
1538 const LogicVRegister& src1, const LogicVRegister& src2);
1542 const LogicVRegister& src1, const LogicVRegister& src2);
1544 const LogicVRegister& src1, const LogicVRegister& src2);
1546 const LogicVRegister& src1, const LogicVRegister& src2);
1577 const LogicVRegister& src1, const LogicVRegister& src2,
1593 const LogicVRegister& src1, const LogicVRegister& src2);
1595 const LogicVRegister& src1, const LogicVRegister& src2);
1597 const LogicVRegister& src1, const LogicVRegister& src2,
1600 const LogicVRegister& src1, const LogicVRegister& src2);
1602 const LogicVRegister& src1, const LogicVRegister& src2);
1605 const LogicVRegister& src2, bool max);
1607 const LogicVRegister& src1, const LogicVRegister& src2);
1609 const LogicVRegister& src1, const LogicVRegister& src2);
1663 const LogicVRegister& src1, const LogicVRegister& src2);
1665 const LogicVRegister& src1, const LogicVRegister& src2);
1667 const LogicVRegister& src1, const LogicVRegister& src2);
1669 const LogicVRegister& src1, const LogicVRegister& src2);
1671 const LogicVRegister& src1, const LogicVRegister& src2);
1673 const LogicVRegister& src1, const LogicVRegister& src2);
1675 const LogicVRegister& src1, const LogicVRegister& src2);
1677 const LogicVRegister& src1, const LogicVRegister& src2);
1679 const LogicVRegister& src1, const LogicVRegister& src2);
1681 const LogicVRegister& src1, const LogicVRegister& src2);
1683 const LogicVRegister& src1, const LogicVRegister& src2);
1685 const LogicVRegister& src1, const LogicVRegister& src2);
1687 const LogicVRegister& src1, const LogicVRegister& src2);
1689 const LogicVRegister& src1, const LogicVRegister& src2);
1691 const LogicVRegister& src1, const LogicVRegister& src2);
1693 const LogicVRegister& src1, const LogicVRegister& src2);
1695 const LogicVRegister& src1, const LogicVRegister& src2,
1698 const LogicVRegister& src1, const LogicVRegister& src2);
1700 const LogicVRegister& src1, const LogicVRegister& src2);
1703 const LogicVRegister& src2, bool max);
1705 const LogicVRegister& src1, const LogicVRegister& src2);
1707 const LogicVRegister& src1, const LogicVRegister& src2);
1715 const LogicVRegister& src1, const LogicVRegister& src2);
1717 const LogicVRegister& src1, const LogicVRegister& src2);
1719 const LogicVRegister& src1, const LogicVRegister& src2);
1721 const LogicVRegister& src1, const LogicVRegister& src2);
1723 const LogicVRegister& src1, const LogicVRegister& src2);
1725 const LogicVRegister& src1, const LogicVRegister& src2);
1788 const LogicVRegister& src1, const LogicVRegister& src2,
1791 const LogicVRegister& src1, const LogicVRegister& src2);
1793 const LogicVRegister& src1, const LogicVRegister& src2);
1828 const LogicVRegister& src2, bool round = true);
1831 const LogicVRegister& src2);
1872 const LogicVRegister& src1, const LogicVRegister& src2);
1890 const LogicVRegister& src1, const LogicVRegister& src2); \
1892 const LogicVRegister& src1, const LogicVRegister& src2);
1905 const LogicVRegister& src1, const LogicVRegister& src2); \
1913 const LogicVRegister& src1, const LogicVRegister& src2);
1915 const LogicVRegister& src1, const LogicVRegister& src2);
1919 const LogicVRegister& src2);
1922 const LogicVRegister& src2);
1925 const LogicVRegister& src1, const LogicVRegister& src2);
1927 const LogicVRegister& src1, const LogicVRegister& src2);
1930 const LogicVRegister& src1, const LogicVRegister& src2);
1932 const LogicVRegister& src1, const LogicVRegister& src2);
1934 const LogicVRegister& src1, const LogicVRegister& src2);
1938 const LogicVRegister& src1, const LogicVRegister& src2,
1941 const LogicVRegister& src1, const LogicVRegister& src2,
1944 const LogicVRegister& src1, const LogicVRegister& src2,
1965 const LogicVRegister& src1, const LogicVRegister& src2);
