Home | History | Annotate | Download | only in arm64

Lines Matching refs:Table

2145 LogicVRegister Simulator::Table(VectorFormat vform, LogicVRegister dst,
2173   return Table(vform, dst, ind, true, &tab);
2180   return Table(vform, dst, ind, true, &tab, &tab2);
2188   return Table(vform, dst, ind, true, &tab, &tab2, &tab3);
2197   return Table(vform, dst, ind, true, &tab, &tab2, &tab3, &tab4);
2203   return Table(vform, dst, ind, false, &tab);
2210   return Table(vform, dst, ind, false, &tab, &tab2);
2218   return Table(vform, dst, ind, false, &tab, &tab2, &tab3);
2227   return Table(vform, dst, ind, false, &tab, &tab2, &tab3, &tab4);