Lines Matching refs:InputSimd128Register
491 src0 = i.InputSimd128Register(0), \
492 src1 = i.InputSimd128Register(1); \
508 src0 = i.InputSimd128Register(0), \
509 src1 = i.InputSimd128Register(1); \
1631 __ vst1(Neon8, NeonListOperand(i.InputSimd128Register(0)),
1728 __ vpush(i.InputSimd128Register(0));
1782 __ ExtractLane(i.OutputFloatRegister(), i.InputSimd128Register(0),
1787 __ ReplaceLane(i.OutputSimd128Register(), i.InputSimd128Register(0),
1792 __ vcvt_f32_s32(i.OutputSimd128Register(), i.InputSimd128Register(0));
1796 __ vcvt_f32_u32(i.OutputSimd128Register(), i.InputSimd128Register(0));
1800 __ vabs(i.OutputSimd128Register(), i.InputSimd128Register(0));
1804 __ vneg(i.OutputSimd128Register(), i.InputSimd128Register(0));
1808 __ vrecpe(i.OutputSimd128Register(), i.InputSimd128Register(0));
1812 __ vrsqrte(i.OutputSimd128Register(), i.InputSimd128Register(0));
1816 __ vadd(i.OutputSimd128Register(), i.InputSimd128Register(0),
1817 i.InputSimd128Register(1));
1822 src0 = i.InputSimd128Register(0),
1823 src1 = i.InputSimd128Register(1);
1839 __ vsub(i.OutputSimd128Register(), i.InputSimd128Register(0),
1840 i.InputSimd128Register(1));
1844 __ vmul(i.OutputSimd128Register(), i.InputSimd128Register(0),
1845 i.InputSimd128Register(1));
1849 __ vmin(i.OutputSimd128Register(), i.InputSimd128Register(0),
1850 i.InputSimd128Register(1));
1854 __ vmax(i.OutputSimd128Register(), i.InputSimd128Register(0),
1855 i.InputSimd128Register(1));
1859 __ vceq(i.OutputSimd128Register(), i.InputSimd128Register(0),
1860 i.InputSimd128Register(1));
1865 __ vceq(dst, i.InputSimd128Register(0), i.InputSimd128Register(1));
1870 __ vcgt(i.OutputSimd128Register(), i.InputSimd128Register(1),
1871 i.InputSimd128Register(0));
1875 __ vcge(i.OutputSimd128Register(), i.InputSimd128Register(1),
1876 i.InputSimd128Register(0));
1884 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonS32,
1889 __ ReplaceLane(i.OutputSimd128Register(), i.InputSimd128Register(0),
1894 __ vcvt_s32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0));
1899 i.InputSimd128Register(0).low());
1904 i.InputSimd128Register(0).high());
1908 __ vneg(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0));
1912 __ vshl(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1917 __ vshr(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1922 __ vadd(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1923 i.InputSimd128Register(1));
1930 __ vsub(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1931 i.InputSimd128Register(1));
1935 __ vmul(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1936 i.InputSimd128Register(1));
1940 __ vmin(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1941 i.InputSimd128Register(1));
1945 __ vmax(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1946 i.InputSimd128Register(1));
1950 __ vceq(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1951 i.InputSimd128Register(1));
1956 __ vceq(Neon32, dst, i.InputSimd128Register(0),
1957 i.InputSimd128Register(1));
1962 __ vcgt(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1963 i.InputSimd128Register(1));
1967 __ vcge(NeonS32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1968 i.InputSimd128Register(1));
1972 __ vcvt_u32_f32(i.OutputSimd128Register(), i.InputSimd128Register(0));
1977 i.InputSimd128Register(0).low());
1982 i.InputSimd128Register(0).high());
1986 __ vshr(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1991 __ vmin(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1992 i.InputSimd128Register(1));
1996 __ vmax(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
1997 i.InputSimd128Register(1));
2001 __ vcgt(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
2002 i.InputSimd128Register(1));
2006 __ vcge(NeonU32, i.OutputSimd128Register(), i.InputSimd128Register(0),
2007 i.InputSimd128Register(1));
2015 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonS16,
2020 __ ReplaceLane(i.OutputSimd128Register(), i.InputSimd128Register(0),
2026 i.InputSimd128Register(0).low());
2031 i.InputSimd128Register(0).high());
2035 __ vneg(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0));
2039 __ vshl(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2044 __ vshr(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2052 __ vadd(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2053 i.InputSimd128Register(1));
2057 __ vqadd(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2058 i.InputSimd128Register(1));
2065 __ vsub(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2066 i.InputSimd128Register(1));
2070 __ vqsub(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2071 i.InputSimd128Register(1));
2075 __ vmul(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2076 i.InputSimd128Register(1));
2080 __ vmin(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2081 i.InputSimd128Register(1));
2085 __ vmax(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2086 i.InputSimd128Register(1));
2090 __ vceq(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2091 i.InputSimd128Register(1));
2096 __ vceq(Neon16, dst, i.InputSimd128Register(0),
2097 i.InputSimd128Register(1));
2102 __ vcgt(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2103 i.InputSimd128Register(1));
2107 __ vcge(NeonS16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2108 i.InputSimd128Register(1));
2113 i.InputSimd128Register(0).low());
2118 i.InputSimd128Register(0).high());
2122 __ vshr(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2130 __ vqadd(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2131 i.InputSimd128Register(1));
2135 __ vqsub(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2136 i.InputSimd128Register(1));
2140 __ vmin(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2141 i.InputSimd128Register(1));
2145 __ vmax(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2146 i.InputSimd128Register(1));
2150 __ vcgt(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2151 i.InputSimd128Register(1));
2155 __ vcge(NeonU16, i.OutputSimd128Register(), i.InputSimd128Register(0),
2156 i.InputSimd128Register(1));
2164 __ ExtractLane(i.OutputRegister(), i.InputSimd128Register(0), NeonS8,
2169 __ ReplaceLane(i.OutputSimd128Register(), i.InputSimd128Register(0),
2174 __ vneg(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0));
2178 __ vshl(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2183 InputSimd128Register(0),
2191 __ vadd(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2192 i.InputSimd128Register(1));
2196 __ vqadd(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2197 i.InputSimd128Register(1));
2201 __ vsub(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2202 i.InputSimd128Register(1));
2206 __ vqsub(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2207 i.InputSimd128Register(1));
2211 __ vmul(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2212 i.InputSimd128Register(1));
2216 __ vmin(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2217 i.InputSimd128Register(1));
2221 __ vmax(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2222 i.InputSimd128Register(1));
2226 __ vceq(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2227 i.InputSimd128Register(1));
2232 __ vceq(Neon8, dst, i.InputSimd128Register(0), i.InputSimd128Register(1));
2237 __ vcgt(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2238 i.InputSimd128Register(1));
2242 __ vcge(NeonS8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2243 i.InputSimd128Register(1));
2247 __ vshr(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2255 __ vqadd(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2256 i.InputSimd128Register(1));
2260 __ vqsub(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2261 i.InputSimd128Register(1));
2265 __ vmin(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2266 i.InputSimd128Register(1));
2270 __ vmax(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2271 i.InputSimd128Register(1));
2275 __ vcgt(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2276 i.InputSimd128Register(1));
2280 __ vcge(NeonU8, i.OutputSimd128Register(), i.InputSimd128Register(0),
2281 i.InputSimd128Register(1));
2296 int src_d_code = i.InputSimd128Register(0).low().code() + index / d_lanes;
2302 __ vand(i.OutputSimd128Register(), i.InputSimd128Register(0),
2303 i.InputSimd128Register(1));
2307 __ vorr(i.OutputSimd128Register(), i.InputSimd128Register(0),
2308 i.InputSimd128Register(1));
2312 __ veor(i.OutputSimd128Register(), i.InputSimd128Register(0),
2313 i.InputSimd128Register(1));
2317 __ vmvn(i.OutputSimd128Register(), i.InputSimd128Register(0));
2322 DCHECK(dst == i.InputSimd128Register(0));
2323 __ vbsl(dst, i.InputSimd128Register(1), i.InputSimd128Register(2));
2328 src1 = i.InputSimd128Register(1);
2329 DCHECK(dst == i.InputSimd128Register(0));
2337 src1 = i.InputSimd128Register(1);
2338 DCHECK(dst == i.InputSimd128Register(0));
2346 src1 = i.InputSimd128Register(1);
2347 DCHECK(dst == i.InputSimd128Register(0));
2357 src1 = i.InputSimd128Register(1);
2358 DCHECK(dst == i.InputSimd128Register(0));
2368 src1 = i.InputSimd128Register(1);
2369 DCHECK(dst == i.InputSimd128Register(0));
2379 src0 = i.InputSimd128Register(0),
2380 src1 = i.InputSimd128Register(1);
2402 src1 = i.InputSimd128Register(1);
2405 DCHECK(dst == i.InputSimd128Register(0));
2413 src1 = i.InputSimd128Register(1);
2415 DCHECK(dst == i.InputSimd128Register(0));
2422 src1 = i.InputSimd128Register(1);
2423 DCHECK(dst == i.InputSimd128Register(0));
2431 src1 = i.InputSimd128Register(1);
2434 DCHECK(dst == i.InputSimd128Register(0));
2442 src1 = i.InputSimd128Register(1);
2445 DCHECK(dst == i.InputSimd128Register(0));
2453 src1 = i.InputSimd128Register(1);
2456 DCHECK(dst == i.InputSimd128Register(0));
2464 src1 = i.InputSimd128Register(1);
2467 DCHECK(dst == i.InputSimd128Register(0));
2475 src1 = i.InputSimd128Register(1);
2476 DCHECK(dst == i.InputSimd128Register(0));
2484 src1 = i.InputSimd128Register(1);
2485 DCHECK(dst == i.InputSimd128Register(0));
2493 src1 = i.InputSimd128Register(1);
2496 DCHECK(dst == i.InputSimd128Register(0));
2504 src1 = i.InputSimd128Register(1);
2507 DCHECK(dst == i.InputSimd128Register(0));
2515 src1 = i.InputSimd128Register(1);
2518 DCHECK(dst == i.InputSimd128Register(0));
2526 src1 = i.InputSimd128Register(1);
2529 DCHECK(dst == i.InputSimd128Register(0));
2536 __ vext(i.OutputSimd128Register(), i.InputSimd128Register(0),
2537 i.InputSimd128Register(1), i.InputInt4(2));
2542 src0 = i.InputSimd128Register(0),
2543 src1 = i.InputSimd128Register(1);
2572 __ vrev64(Neon32, i.OutputSimd128Register(), i.InputSimd128Register(0));
2576 __ vrev64(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0));
2580 __ vrev32(Neon16, i.OutputSimd128Register(), i.InputSimd128Register(0));
2584 __ vrev64(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0));
2588 __ vrev32(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0));
2592 __ vrev16(Neon8, i.OutputSimd128Register(), i.InputSimd128Register(0));
2596 const QwNeonRegister& src = i.InputSimd128Register(0);
2605 const QwNeonRegister& src = i.InputSimd128Register(0);
2614 const QwNeonRegister& src = i.InputSimd128Register(0);
2624 const QwNeonRegister& src = i.InputSimd128Register(0);
2634 const QwNeonRegister& src = i.InputSimd128Register(0);
2648 const QwNeonRegister& src = i.InputSimd128Register(0);
