Lines Matching defs:addr_reg
292 InstructionOperand addr_reg = g.TempRegister();
293 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
295 // Emit desired load opcode, using temp addr_reg.
297 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
382 InstructionOperand addr_reg = g.TempRegister();
383 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
385 // Emit desired store opcode, using temp addr_reg.
387 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value));
1262 InstructionOperand addr_reg = g.TempRegister();
1263 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1265 // Emit desired load opcode, using temp addr_reg.
1267 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
1315 InstructionOperand addr_reg = g.TempRegister();
1316 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1318 // Emit desired store opcode, using temp addr_reg.
1320 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value));
1731 InstructionOperand addr_reg = g.TempRegister();
1732 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1734 // Emit desired load opcode, using temp addr_reg.
1736 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
1767 InstructionOperand addr_reg = g.TempRegister();
1768 Emit(kMipsAdd | AddressingModeField::encode(kMode_None), addr_reg,
1770 // Emit desired store opcode, using temp addr_reg.
1772 addr_reg, g.TempImmediate(0), g.UseRegisterOrImmediateZero(value));
