Lines Matching refs:DefineAsRegister
126 selector->Emit(opcode, g.DefineAsRegister(node),
134 selector->Emit(opcode, g.DefineAsRegister(node),
142 selector->Emit(opcode, g.DefineAsRegister(node),
150 selector->Emit(opcode, g.DefineAsRegister(node),
165 selector->Emit(opcode, g.DefineAsRegister(node),
244 InstructionOperand outputs[] = {g.DefineAsRegister(output_node)};
297 outputs[output_count++] = g.DefineAsRegister(node);
332 Emit(kArchStackSlot, g.DefineAsRegister(node),
350 g.DefineAsRegister(output == nullptr ? node : output),
358 g.DefineAsRegister(output == nullptr ? node : output),
528 Emit(kMips64Ext, g.DefineAsRegister(node),
581 Emit(kMips64Dext, g.DefineAsRegister(node),
625 Emit(kMips64Nor32, g.DefineAsRegister(node),
634 Emit(kMips64Nor32, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
649 Emit(kMips64Nor, g.DefineAsRegister(node),
658 Emit(kMips64Nor, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
685 Emit(kMips64Shl, g.DefineAsRegister(node),
711 Emit(kMips64Ext, g.DefineAsRegister(node),
731 Emit(kMips64Seh, g.DefineAsRegister(node),
735 Emit(kMips64Seb, g.DefineAsRegister(node),
739 Emit(kMips64Shl, g.DefineAsRegister(node),
778 Emit(kMips64Dshl, g.DefineAsRegister(node),
804 Emit(kMips64Dext, g.DefineAsRegister(node),
838 Emit(kMips64ByteSwap64, g.DefineAsRegister(node),
844 Emit(kMips64ByteSwap32, g.DefineAsRegister(node),
850 Emit(kMips64Ctz, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
856 Emit(kMips64Dctz, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
862 Emit(kMips64Popcnt, g.DefineAsRegister(node),
869 Emit(kMips64Dpopcnt, g.DefineAsRegister(node),
894 Emit(kMips64Lsa, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
906 Emit(kMips64Lsa, g.DefineAsRegister(node),
926 Emit(kMips64Dlsa, g.DefineAsRegister(node),
939 Emit(kMips64Dlsa, g.DefineAsRegister(node),
967 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
972 Emit(kMips64Lsa, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
983 g.DefineAsRegister(node), temp, g.UseRegister(m.left().node()));
1024 g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1030 Emit(kMips64Dlsa, g.DefineAsRegister(node),
1041 g.DefineAsRegister(node), temp, g.UseRegister(m.left().node()));
1045 Emit(kMips64Dmul, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1099 Emit(kMips64Mod, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1107 Emit(kMips64ModU, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1131 Emit(kMips64Dmod, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1139 Emit(kMips64DmodU, g.DefineAsRegister(node), g.UseRegister(m.left().node()),
1187 Emit(kMips64FloorWD, g.DefineAsRegister(node),
1191 Emit(kMips64CeilWD, g.DefineAsRegister(node),
1195 Emit(kMips64RoundWD, g.DefineAsRegister(node),
1199 Emit(kMips64TruncWD, g.DefineAsRegister(node),
1211 Emit(kMips64FloorWS, g.DefineAsRegister(node),
1215 Emit(kMips64CeilWS, g.DefineAsRegister(node),
1219 Emit(kMips64RoundWS, g.DefineAsRegister(node),
1223 Emit(kMips64TruncWS, g.DefineAsRegister(node),
1227 Emit(kMips64TruncWS, g.DefineAsRegister(node),
1233 Emit(kMips64TruncWS, g.DefineAsRegister(node),
1260 outputs[output_count++] = g.DefineAsRegister(node);
1264 outputs[output_count++] = g.DefineAsRegister(success_output);
1276 outputs[output_count++] = g.DefineAsRegister(node);
1280 outputs[output_count++] = g.DefineAsRegister(success_output);
1292 outputs[output_count++] = g.DefineAsRegister(node);
1296 outputs[output_count++] = g.DefineAsRegister(success_output);
1309 outputs[output_count++] = g.DefineAsRegister(node);
1313 outputs[output_count++] = g.DefineAsRegister(success_output);
1344 Emit(kMips64Shl, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
1380 Emit(kMips64Dext, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
1409 Emit(kMips64Ext, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
1421 Emit(kMips64CvtSW, g.DefineAsRegister(node),
1468 Emit(kMips64Float64InsertLowWord32, g.DefineAsRegister(node),
1534 Emit(kMips64Float32Max, g.DefineAsRegister(node),
1540 Emit(kMips64Float64Max, g.DefineAsRegister(node),
1546 Emit(kMips64Float32Min, g.DefineAsRegister(node),
1552 Emit(kMips64Float64Min, g.DefineAsRegister(node),
1700 Emit(kMips64Peek, g.DefineAsRegister(output.node),
1751 g.DefineAsRegister(node), g.UseRegister(base), g.UseImmediate(index));
1758 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
2391 g.DefineAsRegister(node), g.UseRegister(base), g.UseImmediate(index));
2398 g.DefineAsRegister(node), addr_reg, g.TempImmediate(0));
2845 Emit(kMips64S32x4Shuffle, g.DefineAsRegister(node), g.UseRegister(input0),
2849 Emit(kMips64S8x16Shuffle, g.DefineAsRegister(node), g.UseRegister(input0),
2858 Emit(kMips64Seb, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
2863 Emit(kMips64Seh, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
2868 Emit(kMips64Seb, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
2873 Emit(kMips64Seh, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)));
2878 Emit(kMips64Shl, g.DefineAsRegister(node), g.UseRegister(node->InputAt(0)),
